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公开(公告)号：WO2010015678A3
公开(公告)日：2010-10-28
申请号：PCT/EP2009060213
申请日：2009-08-06
Applicant: IBM , IBM UK , STAMPER ANTHONY , ANDERSON FELIX PATRICK , MCDEVITT THOMAS LEDDY , EDELSTEIN DANIEL , COTE WILLIAM
Inventor： STAMPER ANTHONY , ANDERSON FELIX PATRICK , MCDEVITT THOMAS LEDDY , EDELSTEIN DANIEL , COTE WILLIAM
IPC: H01L23/532 , H01L21/3105 , H01L21/60 , H01L21/768 , H01L23/485
CPC classification number: H01L24/13 , H01L21/3105 , H01L21/76807 , H01L21/76814 , H01L21/76826 , H01L21/76831 , H01L23/53238 , H01L23/53295 , H01L24/11 , H01L24/45 , H01L24/48 , H01L24/85 , H01L2221/1036 , H01L2224/0401 , H01L2224/05124 , H01L2224/05147 , H01L2224/05166 , H01L2224/05181 , H01L2224/05647 , H01L2224/05666 , H01L2224/13022 , H01L2224/13027 , H01L2224/13099 , H01L2224/13111 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/45147 , H01L2224/48847 , H01L2924/00011 , H01L2924/01005 , H01L2924/01014 , H01L2924/01018 , H01L2924/01029 , H01L2924/01033 , H01L2924/01044 , H01L2924/01047 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/04953 , H01L2924/14 , H01L2924/19042 , H01L2924/00014 , H01L2924/00 , H01L2924/01006
Abstract: Structures with improved solder bump connections and methods of fabricating such structures are provided herein. The structure includes a trench formed in a dielectric layer which has at least a portion (12) thereof devoid of a fluorine boundary layer. The structure further includes a copper wire (20) in the trench having at least a bottom portion thereof in contact with the non- fluoride boundary layer (12) of the trench. A lead free solder bump (34) is in electrical contact with the copper wire (20).
Abstract translation: 具有改善的焊料凸点连接的结构和制造这种结构的方法在本文中提供。 该结构包括形成在电介质层中的沟槽，该沟槽至少具有一部分（12）缺少氟边界层。 该结构还包括在沟槽中的铜线（20），其至少其底部与沟槽的非氟化物边界层（12）接触。 无铅焊料凸块（34）与铜线（20）电接触。
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2.发明专利Vertical integrated circuit switch, design structure, and its manufacturing method 有权垂直集成电路开关，设计结构及其制造方法
公开(公告)号：JP2010251321A
公开(公告)日：2010-11-04
申请号：JP2010093002
申请日：2010-04-14
Applicant: Internatl Business Mach Corp
, インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation Inventor： ANTHONY K STAMPER , COONEY III EDWARD CRANDAL , ANDERSON FELIX PATRICK , MCDEVITT THOMAS LEDDY
CPC classification number: H01H59/0009 , H01L2924/0002 , H01L2924/00
Abstract: PROBLEM TO BE SOLVED: To provide a vertical integrated MEMS switch which can overcome conventional defects or restriction, a design structure and a manufacturing method of such a vertical switch. SOLUTION: The manufacturing method of a MEMS switch, includes forming at least two vertically extending vias in a wafer and filling the at least two vertically extending vias with a metal to form at least two vertically extending wires. The method further includes opening a void in the wafer from a bottom side such that at least one of the vertically extending wires is moveable within the void. COPYRIGHT: (C)2011,JPO&INPIT
Abstract translation: 要解决的问题：提供可以克服传统缺陷或限制的垂直集成MEMS开关，这种垂直开关的设计结构和制造方法。 解决方案：MEMS开关的制造方法包括在晶片中形成至少两个垂直延伸的通孔并用金属填充至少两个垂直延伸的通孔以形成至少两个垂直延伸的导线。 该方法还包括从底侧打开晶片中的空隙，使得垂直延伸的线中的至少一个可在空隙内移动。 版权所有（C）2011，JPO＆INPIT
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公开(公告)号：GB2506770B8
公开(公告)日：2015-09-23
申请号：GB201321363
申请日：2010-08-12
Applicant: IBM , RF MICRO DEVICES INC
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公开(公告)号：GB2496985A
公开(公告)日：2013-05-29
申请号：GB201221074
申请日：2012-11-23
Applicant: IBM
Inventor： MCDEVITT THOMAS LEDDY , COONEY EDWARD CRANDAL , CHRISMAN GREGORY SCOTT , GAMBINO JEFFREY , SHAH EVA , HE ZHONG-XIANG
IPC: H01L21/768 , H01L23/522 , H01L23/64
Abstract: A method of fabricating a structure that provides an interconnect metal wire. A damascene metal wire 20 is surrounded by an insulator 12. To prevent cracking within the insulator material caused by thermal expansion of the metal wire an upper portion of the insulator is etched away to leave an exposed portion of said metal wire. The protruding portion of the metal wire is then rounded using a chemical mechanical polishing (CMP) process. This process results in a wire that has a central portion C that is higher than that of its distil edge, and higher than the top surface of the insulator. During the polishing process no material from the central point of the wire is removed. The disclosed method can be used in the formation of integrated damascene inductors.
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Patent Agency Ranking
公开(公告)号：DE19505748A1
公开(公告)日：1996-08-29
申请号：DE19505748
申请日：1995-02-20
Applicant: IBM
Inventor： KNIGHT STEPHEN ERROLD , LUCE STEPHEN ELLINWOOD , MCDEVITT THOMAS LEDDY
IPC: G03F7/16 , H01L21/027 , H01L21/285 , H01L21/3105 , H01L21/312 , G03F7/09 , H01L21/469
Abstract: The invention provides a method for substrate preparation prior to applying photoresist to the substrate. A substrate, such as a TEOS-based silicon dioxide or silicon nitride film, is selected and treated with reactive oxygen. The reactive oxygen can comprise ozone or ozone plasma, for example. After treatment of the substrate, the photoresist, preferably an acid-catalyzed photoresist for use with deep UV sensitization, is applied.
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公开(公告)号：GB2506770A8
公开(公告)日：2015-09-23
申请号：GB201321363
申请日：2010-08-12
Applicant: IBM , RF MICRO DEVICES INC
Inventor： ANDERSON FELIX P , MCDEVITT THOMAS LEDDY , STAMPER ANTHONY K , COSTA JULIO CARLOS , HAMMOND JONATHAN HALE
Abstract: A MEMS structure, comprising a lower forcing electrode and a lower contact electrode, remote from the lower forcing electrode; a cantilever beam 34 is positioned above the lower forcing electrode and the lower contact electrode; a capping layer 42 hermetically seals the lower forcing electrode, the lower contact electrode and the cantilever beam 34, the capping layer 42 having a sealed portion 40 positioned on a side of the lower contact electrode, remote from the lower forcing electrode and an end portion of the cantilever beam 34. Wherein the cantilever beam 34 may be devoid of stresses from material variability of a sealing material used to seal the capping layer 42.
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公开(公告)号：GB2506770B
公开(公告)日：2014-08-20
申请号：GB201321363
申请日：2010-08-12
Applicant: IBM
Inventor： ANDERSON FELIX P , MCDEVITT THOMAS LEDDY , STAMPER ANTHONY K
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公开(公告)号：GB2506770A
公开(公告)日：2014-04-09
申请号：GB201321363
申请日：2010-08-12
Applicant: IBM , RF MICRO DEVICES INC
Inventor： ANDERSON FELIX P , MCDEVITT THOMAS LEDDY , STAMPER ANTHONY K , COSTA JULIO CARLOS , HAMMOND JONATHAN HALE
Abstract: A MEMS structure, comprising a lower forcing electrode and a lower contact electrode, remote from the lower forcing electrode; a cantilever beam 34 is positioned above the lower forcing electrode and the lower contact electrode; a capping layer 42 hermetically seals the lower forcing electrode, the lower contact electrode and the cantilever beam 34, the capping layer 42 having a sealed portion 40 positioned on a side of the lower contact electrode, remote from the lower forcing electrode and an end portion of the cantilever beam 34. Wherein the cantilever beam 34 may be devoid of stresses from material variability of a sealing material used to seal the capping layer 42.
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公开(公告)号：SG42979A1
公开(公告)日：1997-10-17
申请号：SG1996001715
申请日：1992-03-31
Applicant: IBM
Inventor： LEE PEI-ING PAUL , LICATA THOMAS JOHN , MCDEVITT THOMAS LEDDY , PARRIES PAUL CHRISTIAN , PENNINGTON SCOTT LEWIS , RYAN JAMES GARDINER , STRIPPE DAVID CRAIG
IPC: C23C14/04 , H01L21/203 , C23C14/46 , H01L21/28 , H01L21/285 , H01L21/768 , H05K3/40
Abstract: A sputtering deposition wherein high aspect ratio apertures (50) are coated with conductive films (40) exhibiting low bulk resistivity, low impurity concentrations, and regular morphologies. A collimator (60) is used having an aspect ratio that approximates the aspect ratio of the apertures (50). The resulting film thickness at the bottom of the aperture is at least 2X what can be achieved using conventional sputtering methods.
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