Abstract:
PROBLEM TO BE SOLVED: To provide a method of forming a polycrystalline silicon having hyperfine particle sizes. SOLUTION: The method of forming a polycrystalline silicon having hyperfine particle sizes employs a differential heating of upper and lower surfaces of a substrate of a CVD apparatus, in which the lower surface of the substrate receives considerably more power than the upper surface, preferably more than 75% of the entire power; and in which the substrate is maintained during deposition at a temperature higher than 50°C above 550°C of crystallization temperature of silicon. COPYRIGHT: (C)2005,JPO&NCIPI
Abstract:
The present invention relates to a semiconductor device comprising at least one n-channel field effect transistor (n-FET). Specifically, the n-FET comprises first and second patterned stressor layers that both contain a carbon-substituted and tensilely stressed single crystal semiconductor. The first patterned stressor layer has a first carbon concentration and is located in source and drain (S/D) extension regions of the n-FET at a first depth. The second patterned stressor layer has a second, higher carbon concentration and is located in S/D regions of the n-FET at a second, deeper depth. Such an n-FET with the first and second patterned stressor layers of different carbon concentration and different depths provide improved stress profile for enhancing electron mobility in the channel region of the n-FET.
Abstract:
Expitaxial substitutional solid solutions of silicon carbon (101 ) can be obtained by an ultra-fast anneal of an amorphous carbon-containing silicon material. The anneal is performed at a temperature above the recrystallization point, but below the melting point of the material and preferably lasts for less than 100 milliseconds in this temperature regime. The anneal is preferably a flash anneal or laser anneal. This approach is able to produce epitaxial silicon and carbon-containing materials (101 ) with a substantial portion of the carbon atoms at substitutional lattice positions. The approach is especially useful in CMOS processes and other electronic device manufacture where the presence of epitaxial Si1-yCy, y
Abstract:
A system for manipulating dislocations on semiconductor devices, includes a moveable laser configured to generate a laser beam locally on a surface portion of the semiconductor body having a plurality of dislocations, the moveable laser being characterized as having a scan speed, the moveable laser manipulates the plurality of dislocations on the surface portion of the semiconductor body by adjusting the temperature and the scan speed of the laser beam.
Abstract:
Integrated circuit system With Carbon and Non-Carbon sILICON An integrated circuit system includes a substrate, a carbon-containing silicon region over the substrate, a non-carbon-containing silicon region over the substrate, and a silicon-carbon region, including the non-carbon- containing silicon region and the carbon-containing silicon region.
Abstract:
The present invention relates to a semiconductor device comprising at least one n-channel field effect transistor (n-FET). Specifically, the n-FET comprises first and second patterned stressor layers that both contain a carbon-substituted and tensilely stressed single crystal semiconductor. The first patterned stressor layer has a first carbon concentration and is located in source and drain (S/D) extension regions of the n-FET at a first depth. The second patterned stressor layer has a second, higher carbon concentration and is located in S/D regions of the n-FET at a second, deeper depth. Such an n-FET with the first and second patterned stressor layers of different carbon concentration and different depths provide improved stress profile for enhancing electron mobility in the channel region of the n-FET.
Abstract:
An integrated circuit system that includes: providing a PFET device including a doped epitaxial layer; and forming a source/drain extension by employing an energy source to diffuse a dopant from the doped epitaxial layer.
Abstract:
INTEGRATED CIRCUIT SYSTEM EMPLOYING DIFFUSED SOURCE/DRAIN EXTENSIONSAn integrated circuit system that includes: providing a Pl-ET device including a doped epitaxial layer; and forming a source/drain extension by employing an energy source to diffuse a dopant from the doped epitaxial layer.Fig. 8
Abstract:
An integrated circuit system includes a substrate, a carbon-containing silicon region over the substrate, a non-carbon-containing silicon region over the substrate, and a silicon-carbon region, including the non-carbon- containing silicon region and the carbon-containing silicon region.