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公开(公告)号:DE68923811T2
公开(公告)日:1996-04-18
申请号:DE68923811
申请日:1989-03-09
Applicant: IBM
Inventor: FIFIELD JOHN ATKINSON , KALTER HOWARD LEO , MILLER CHRISTOPHER PAUL , TOMASHOT STEVEN WILLIAM
IPC: G11C11/413 , G11C11/401 , G11C29/00 , G11C29/04 , G06F11/20
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公开(公告)号:ES2135507T3
公开(公告)日:1999-11-01
申请号:ES94108520
申请日:1994-06-03
Applicant: IBM
Inventor: BERTIN CLAUDE LOUIS , FARRAR SR PAUL ALDEN , HOWELL WAYNE JOHN , MILLER CHRISTOPHER PAUL , PERLMAN DAVID JACOB
IPC: H01L25/00 , H01L21/98 , H01L23/52 , H01L25/065
Abstract: A cube package of stacked silicon semiconductor chips. To accommodate cube packaging, a metal transfer layer is added over the passivated chip face (16) to bring all of the surface electrical contacts to a common chip edge. The metal transfer layer (9) is insulated from the chip face and from the adjacent chip in the stack by polymer layers (16) having a low dielectric constant, and a thermal expansion coefficient matching that of the stacked chips. An adhesive polymer layer is added to strengthen the bond between the first polymer layers and the adjacent chip in the stack, by deposition of the adhesive layer and partial cure at the wafer level, and then full cure when the chips are stacked together to form the cube.
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公开(公告)号:DE69420201T2
公开(公告)日:2000-03-23
申请号:DE69420201
申请日:1994-06-03
Applicant: IBM
Inventor: BERTIN CLAUDE LOUIS , FARRAR SR , HOWELL WAYNE JOHN , MILLER CHRISTOPHER PAUL , PERLMAN DAVID JACOB
IPC: H01L25/00 , H01L21/98 , H01L23/52 , H01L25/065
Abstract: A cube package of stacked silicon semiconductor chips. To accommodate cube packaging, a metal transfer layer is added over the passivated chip face (16) to bring all of the surface electrical contacts to a common chip edge. The metal transfer layer (9) is insulated from the chip face and from the adjacent chip in the stack by polymer layers (16) having a low dielectric constant, and a thermal expansion coefficient matching that of the stacked chips. An adhesive polymer layer is added to strengthen the bond between the first polymer layers and the adjacent chip in the stack, by deposition of the adhesive layer and partial cure at the wafer level, and then full cure when the chips are stacked together to form the cube.
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公开(公告)号:DE69420201D1
公开(公告)日:1999-09-30
申请号:DE69420201
申请日:1994-06-03
Applicant: IBM
Inventor: BERTIN CLAUDE LOUIS , FARRAR SR , HOWELL WAYNE JOHN , MILLER CHRISTOPHER PAUL , PERLMAN DAVID JACOB
IPC: H01L25/00 , H01L21/98 , H01L23/52 , H01L25/065
Abstract: A cube package of stacked silicon semiconductor chips. To accommodate cube packaging, a metal transfer layer is added over the passivated chip face (16) to bring all of the surface electrical contacts to a common chip edge. The metal transfer layer (9) is insulated from the chip face and from the adjacent chip in the stack by polymer layers (16) having a low dielectric constant, and a thermal expansion coefficient matching that of the stacked chips. An adhesive polymer layer is added to strengthen the bond between the first polymer layers and the adjacent chip in the stack, by deposition of the adhesive layer and partial cure at the wafer level, and then full cure when the chips are stacked together to form the cube.
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公开(公告)号:AT183851T
公开(公告)日:1999-09-15
申请号:AT94108520
申请日:1994-06-03
Applicant: IBM
Inventor: BERTIN CLAUDE LOUIS , FARRAR SR PAUL ALDEN , HOWELL WAYNE JOHN , MILLER CHRISTOPHER PAUL , PERLMAN DAVID JACOB
IPC: H01L25/00 , H01L21/98 , H01L23/52 , H01L25/065
Abstract: A cube package of stacked silicon semiconductor chips. To accommodate cube packaging, a metal transfer layer is added over the passivated chip face (16) to bring all of the surface electrical contacts to a common chip edge. The metal transfer layer (9) is insulated from the chip face and from the adjacent chip in the stack by polymer layers (16) having a low dielectric constant, and a thermal expansion coefficient matching that of the stacked chips. An adhesive polymer layer is added to strengthen the bond between the first polymer layers and the adjacent chip in the stack, by deposition of the adhesive layer and partial cure at the wafer level, and then full cure when the chips are stacked together to form the cube.
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公开(公告)号:DE68923811D1
公开(公告)日:1995-09-21
申请号:DE68923811
申请日:1989-03-09
Applicant: IBM
Inventor: FIFIELD JOHN ATKINSON , KALTER HOWARD LEO , MILLER CHRISTOPHER PAUL , TOMASHOT STEVEN WILLIAM
IPC: G11C11/413 , G11C11/401 , G11C29/00 , G11C29/04 , G06F11/20
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