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公开(公告)号:JP2003016774A
公开(公告)日:2003-01-17
申请号:JP2001194227
申请日:2001-06-27
Inventor: MIYATAKE HISATADA , NODA HIROYOSHI , UMEZAKI HIROSHI , ASANO HIDEO , SUNANAGA TOSHIO , KITAMURA TSUNEJI
IPC: G11C11/14 , G11C11/15 , H01L21/8246 , H01L27/105 , H01L43/08
Abstract: PROBLEM TO BE SOLVED: To solve such a problem that because a current is required to make to flow for each bit line when data are written simultaneously in a plurality of data bits belonging to the same column address, a current required for write-in is enlarged.
SOLUTION: This device comprises a plurality of pairs of bit line comprising a first bit line and a second bit line, a plurality of storage cells storing information in accordance with the direction of a current flowing in the pair of bit line, at least one current driving source connected to at least one of pairs of bit line and making to flow a current in the first bit line and the second bit line of which the directions of current are reverse each other, at least one switch circuit connecting pairs of bit line and pairs of bit line, and a control circuit controlling a connection state of the switch circuit in accordance with information stored in the storage cell.
COPYRIGHT: (C)2003,JPOAbstract translation: 要解决的问题:为了解决由于在属于同一列地址的多个数据位中同时写入数据时需要为每个位线流动电流的问题,写入所需的电流为 放大 解决方案:该装置包括多对位线,包括第一位线和第二位线,多个存储单元根据在一对位线中流动的电流的方向存储信息,至少一个电流 驱动源连接到位线对中的至少一个并使得流过第一位线中的电流,并且使电流方向彼此相反的第二位线,至少一个连接成对的位线和 一对位线,以及根据存储在存储单元中的信息来控制开关电路的连接状态的控制电路。
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2.
公开(公告)号:JP2004127463A
公开(公告)日:2004-04-22
申请号:JP2002293309
申请日:2002-10-07
Applicant: Internatl Business Mach Corp
, インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation Inventor: MIYATAKE HISATADA , UMEZAKI HIROSHI , KITAMURA TSUNEJI , SUNANAGA TOSHIO , NODA HIROYOSHI , ASANO HIDEO
IPC: G11C11/15 , G11C29/02 , H01L21/8246 , H01L27/105 , H01L43/08
CPC classification number: G11C11/16 , G11C29/02 , G11C29/028 , G11C2029/5006
Abstract: PROBLEM TO BE SOLVED: To provide a method for determining an optimum write bit line current and an optimum write word line current in an MRAM.
SOLUTION: In an asteroid curve represented by a bit line magnetic field H
x generated by a write bit line current I
B and a word line magnetic field H
y generated by a write word line current I
W , manufacturing variations and a design margin are taken into consideration to assume an asteroid curve AC
out outside all memory cell asteroid curves (located with a hatched area of Figure). The write bit line current and write word line current are selected so as to minimize write electric power consumed by a write current obtained by totalizing the write bit line current and the write word line current or a bit line and a write word line. In addition, a write bit line current and a write word line current are selected so as to form a synthetic magnetic field on a curve between a point H1 and a point H2 on the asteroid curve AC
out in order to prevent multi-selection.
COPYRIGHT: (C)2004,JPO-
公开(公告)号:JP2002230965A
公开(公告)日:2002-08-16
申请号:JP2001015475
申请日:2001-01-24
Applicant: IBM
Inventor: ASANO HIDEO , SUNANAGA TOSHIO , KITAMURA TSUNEJI , MIYATAKE HISATADA , UMEZAKI HIROSHI , NODA HIROYOSHI
IPC: G11C11/14 , G11C11/15 , G11C11/16 , H01L21/8246 , H01L27/105 , H01L43/08
Abstract: PROBLEM TO BE SOLVED: To improve the reliability of recording of a MRAM. SOLUTION: This device has read-out word lines WLR and write-in word lines WLW extending in the direction of (y), and write-in read-out bit lines BLW/R and write-in bit lines BLW extending in the direction of (x), and a memory cell MC is arranged at an intersection of a word line and a bit line. The memory cell MC comprises a sub-cell SC1 and a sub-cell SC2, the sub-cell SC1 comprises magnetic resistance elements MTJ1, MTJ2, and a selection transistor Tr1, and the sub-cell SC2 comprises magnetic resistance elements MTJ3, MTJ4, and a selection transistor Tr2, and the sub-cell SC2, The magnetic resistance elements MTJ1 and MTJ2 are connected in parallel, also, the magnetic resistance elements MTJ3 and MTJ2 are connected in parallel. The sub- cells SC1 and SC2 are connected in series between the write-in read-out bit lines BLW/R and ground.
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4.
公开(公告)号:JP2003016773A
公开(公告)日:2003-01-17
申请号:JP2001199556
申请日:2001-06-29
Inventor: SUNANAGA TOSHIO , MIYATAKE HISATADA , KITAMURA TSUNEJI , ASANO HIDEO , NODA HIROYOSHI , UMEZAKI HIROSHI
IPC: G11C11/14 , G11C11/15 , H01F10/08 , H01L21/8246 , H01L27/105 , H01L43/08
CPC classification number: G11C11/15 , G11C14/0081
Abstract: PROBLEM TO BE SOLVED: To provide a register provided with a non-volatile data storing function. SOLUTION: This device comprises a data write-in block 12 comprising a non-volatile storage element, and a data restoring block 14 for reading out data stored in the non-volatile storage element. MTJ elements 16a, 16b are used as a non-volatile storage element.
Abstract translation: 要解决的问题:提供具有非易失性数据存储功能的寄存器。 解决方案:该装置包括包括非易失性存储元件的数据写入块12和用于读出存储在非易失性存储元件中的数据的数据恢复块14。 MTJ元件16a,16b用作非易失性存储元件。
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公开(公告)号:JP2002353415A
公开(公告)日:2002-12-06
申请号:JP2001154215
申请日:2001-05-23
Applicant: IBM
Inventor: UMEZAKI HIROSHI , MIYATAKE HISATADA , NODA HIROYOSHI , ASANO HIDEO , SUNANAGA TOSHIO , KITAMURA TSUNEJI
IPC: G11C11/14 , G11C11/15 , H01L21/8246 , H01L27/10 , H01L27/105 , H01L43/08
Abstract: PROBLEM TO BE SOLVED: To provide a storage cell having a small current for writing and a small change of a switching magnetic field, and to provide a memory cell and a storage circuit block. SOLUTION: The storage cell 10 comprises a plurality of superposed layers, a free ferromagnetic layer 12 in which the direction of a magnetization is changed by the direction of a magnetic field in a plurality of the layers, and a hollow part 19 formed, so as to pass the central part of the plurality of the layers through the plurality of the layers. The memory cell 20 comprises a conductor 22, in which a writing current flows to the hollow part 19 of the cell 10.
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公开(公告)号:JP2001194023A
公开(公告)日:2001-07-17
申请号:JP2000000193
申请日:2000-01-05
Applicant: IBM
Inventor: AOYANAGI AKIHIKO , NODA HIROYOSHI , MARK I RATOWITZ , PETER FETTIGER
Abstract: PROBLEM TO BE SOLVED: To provide a dehumidifier which can be fixed to a small space of the cover of a disc drive and can sustain the inner humidity of the disc drive at a low level permanently, and to perform dehumidification stably without forming any dew on the inside or the outside of the disc drive by controlling the dehumidifier based on the inner humidity or the temperature conditions on the inside and the outside of the disc drive. SOLUTION: The dehumidifier comprises glass fibers 55 disposed to penetrate the cover 3 of a hard disc drive HDD and extending over the inside and outside thereof, and a heating member 53 disposed on the outside of the HDD wherein the glass fibers 55 on the outside are bonded to the heating member and heated. Furthermore, a cooling member is provided on the inside of the HDD and the glass fibers on the inside are bonded to the cooling member. Means for circulating air touching a heating part and cooling part is also provided.
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公开(公告)号:JP2003016779A
公开(公告)日:2003-01-17
申请号:JP2001199723
申请日:2001-06-29
Inventor: SUNANAGA TOSHIO , MIYATAKE HISATADA , KITAMURA TSUNEJI , UMEZAKI HIROSHI , NODA HIROYOSHI , ASANO HIDEO
IPC: G11C11/14 , G11C11/15 , H01L21/8246 , H01L27/105 , H01L43/08
Abstract: PROBLEM TO BE SOLVED: To provide a storage circuit block in which a write-in current can be reduced, and to provide a method for accessing the storage circuit block.
SOLUTION: This storage circuit block 10 comprises a means for holding data stored in a sense amplifier 24, a means holding data inputted to an input/ output pad 22, and a means for comparing data held in the means holding data stored in the sense amplifier 24 with data held in the means holding data inputted to the input/output pad 22.
COPYRIGHT: (C)2003,JPOAbstract translation: 要解决的问题:提供可以减少写入电流的存储电路块,并提供访问存储电路块的方法。 解决方案:该存储电路块10包括用于保存存储在读出放大器24中的数据的装置,保持输入到输入/输出焊盘22的数据的装置,以及用于比较保存在存储在读出放大器 24,其中保存有保持输入到输入/输出垫22的数据的装置中的数据。
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公开(公告)号:JP2003016778A
公开(公告)日:2003-01-17
申请号:JP2001199620
申请日:2001-06-29
Inventor: SUNANAGA TOSHIO , MIYATAKE HISATADA , KITAMURA TSUNEJI , UMEZAKI HIROSHI , NODA HIROYOSHI , ASANO HIDEO
CPC classification number: G11C11/15 , G11C2207/2263
Abstract: PROBLEM TO BE SOLVED: To provide a storage circuit block in which a write-in current can be reduced, and to provide a method for accessing the storage circuit block. SOLUTION: This device comprises a means for detecting a data write-in current flowing in a bit line 32, and a means for generating a stop signal of a data write-in current flowing in the bit line 32 and a write-in word line 30.
Abstract translation: 要解决的问题:提供可以减少写入电流的存储电路块,并提供访问存储电路块的方法。 解决方案:该装置包括用于检测在位线32中流动的数据写入电流的装置,以及用于产生在位线32中流动的数据写入电流的停止信号的装置和写入字线 30。
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公开(公告)号:JPH04337509A
公开(公告)日:1992-11-25
申请号:JP12312591
申请日:1991-04-26
Applicant: IBM
Inventor: ARAI YUICHI , KOBAYASHI SAKAE , NODA HIROYOSHI , TAKEDA KAZUYA , UMEZAKI HIROSHI
Abstract: PURPOSE: To embody high-density recording by a ferrite head by joining the bonding bumps of two chips, thereby forming a winding coil. CONSTITUTION: The chip 1 is formed with multilayered wirings 10 and the bonding bumps 13 on an Si substrate 12. The chip 2 is formed with the multilayered wirings 10 of copper, conducting paths 14 penetrating the substrate, the bonding bumps 13 and grooves 6 for crossing the ferrite cores. The bonding bumps 13 are composed of a low melting solder and are melted by a heat treatment at about 150 deg.C. The chips 1 and 2 are joined by melting the bonding bumps 13, by which the winding coil is formed.
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