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公开(公告)号:DE10393309T5
公开(公告)日:2005-12-29
申请号:DE10393309
申请日:2003-09-16
Applicant: IBM , INFINEON TECHNOLOGIES AG
Inventor: CABRAL CYRIL JR , IGGULDEN ROY C , MCSTAY IRENE LENNOX , CLEVENGER LAWRENCE A , WANG YUN YU , WONG KEITH KWONG HON , ROBL WERNER , GLUSCHENKOV OLEG , MALIK RAJEEV , SCHUTZ RONALD J
IPC: H01L20060101 , H01L21/28 , H01L21/3205 , H01L21/336 , H01L21/4763 , H01L21/768 , H01L23/522 , H01L29/40 , H01L29/51 , H01L29/78
Abstract: A conductive structure in an integrated circuit ( 12 ), and a method of forming the structure, is provided that includes a polysilicon layer ( 30 ), a thin layer containing titanium over the polysilicon, a tungsten nitride layer ( 34 ) over the titanium-containing layer and a tungsten layer over the tungsten nitride layer. The structure also includes a silicon nitride interfacial region ( 38 ) between the polysilicon layer and the titanium-containing layer. The structure withstands high-temperature processing without substantial formation of metal silicides in the polysilicon layer ( 30 ) and the tungsten layer ( 32 ), and provides low interface resistance between the tungsten layer and the polysilicon layer.
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2.METHOD AND STRUCTURE FOR FORMING SLOT VIA BITLINE FOR MRAM DEVICES 审中-公开
Title translation: 方法和结构,每一位线FOR MRAM器件插槽的形成公开(公告)号:EP1911096A4
公开(公告)日:2008-10-22
申请号:EP06788341
申请日:2006-07-24
Applicant: IBM
Inventor: DALTON TIMOTHY J , HSU LOUIS L C , WONG KEITH KWONG HON , YANG CHIH-CHAO , GAIDIS MICHAEL C , RADENS CARL , CLEVENGER LAWRENCE A
IPC: H01L27/22 , H01L21/768 , H01L21/8247 , H01L23/528 , H01L43/12
CPC classification number: B82Y10/00 , H01L27/222 , H01L43/12
Abstract: A magnetic random access memory (MRAM) device includes a magnetic tunnel junction (MTJ) stack formed over a lower wiring level, a hardmask formed on the MTJ stack, and an upper wiring level formed over the hardmask. The upper wiring level includes a slot via bitline formed therein, the slot via bitline in contact with the hardmask and in contact with an etch stop layer partially surrounding sidewalls of the hardmask.
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3.STRUCTURE AND METHOD FOR MOSFET GATE ELECTRODE LANDING PAD 审中-公开
Title translation: 结构及方法MOSFET栅极电极着陆区公开(公告)号:EP1994563A4
公开(公告)日:2011-06-22
申请号:EP07797080
申请日:2007-01-16
Applicant: IBM
Inventor: CLEVENGER LAWRENCE A , DALTON TIMOTHY J , HSU LOUIS C , RADENS CARL , WONG KWONG-HON , YANG CHIH-CHAO
IPC: H01L27/01 , H01L21/8234
CPC classification number: H01L27/1203 , H01L21/28114 , H01L21/823456 , H01L21/84 , H01L29/42376 , H01L2924/0002 , H01L2924/00
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4.HIGH DENSITY PLANAR MAGNETIC DOMAIN WALL MEMORY APPARATUS AND METHOD OF FORMING THE SAME 有权
Title translation: 具有平面磁畴壁的高密度记忆体装置及其制造方法公开(公告)号:EP2140458A4
公开(公告)日:2010-05-05
申请号:EP07867608
申请日:2007-12-04
Applicant: IBM
Inventor: GAIDIS MICHAEL C , CLEVENGER LAWRENCE A , DALTON TIMOTHY J , DEBROSSE JOHN K , HSU LOUIS L C , RADENS CARL , WONG KEITH K H , YANG CHIH-CHAO
CPC classification number: G11C19/0841 , B82Y10/00 , G11C5/02 , G11C11/161 , G11C11/1675 , Y10T29/53165
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5.ANISOTROPIC STRESS GENERATION BY STRESS-GENERATING LINERS HAVING A SUBLITHOGRAPHIC WIDTH 有权
Title translation: GENERATING各向异性电压除以与宽SUBLITHOGRTAFISCHER电压生成衬砌公开(公告)号:EP2235744A4
公开(公告)日:2011-12-14
申请号:EP09704513
申请日:2009-01-15
Applicant: IBM
Inventor: CLEVENGER LAWRENCE A , DORIS BRUCE B , HUANG ELBERT E , PURUSHOTHAMAN SAMPATH , RADENS CARL J
IPC: H01L29/78 , H01L21/311 , H01L21/336 , H01L21/8238
CPC classification number: H01L21/31144 , H01L21/823807 , H01L21/823814 , H01L21/823871 , H01L21/84 , H01L27/1203 , H01L29/665 , H01L29/7833 , H01L29/7843
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公开(公告)号:EP1875499A4
公开(公告)日:2009-11-04
申请号:EP06749449
申请日:2006-04-07
Applicant: IBM
Inventor: YANG CHIH-CHAO , CLEVENGER LAWRENCE A , DALTON TIMOTHY J , HSU LOUIS C
IPC: H01L21/8242 , H01L21/20
CPC classification number: H01L23/5223 , H01L23/5329 , H01L23/53295 , H01L2924/0002 , H01L2924/00
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7.
公开(公告)号:EP1920493A4
公开(公告)日:2011-05-04
申请号:EP06802645
申请日:2006-08-30
Applicant: IBM
Inventor: HSU LOUIS C , CLEVENGER LAWRENCE A , DALTON TIMOTHY J , RADENS CARL J , WONG KEITH KWONG HON , YANG CHIH-CHAO
CPC classification number: H01H50/005 , H01H2050/007 , Y10T29/4902 , Y10T29/49105 , Y10T29/49147
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公开(公告)号:EP1869700A4
公开(公告)日:2010-12-15
申请号:EP06740771
申请日:2006-04-07
Applicant: IBM
Inventor: YANG CHIH-CHAO , CLEVENGER LAWRENCE A , COWLEY ANDREW P , DALTON TIMOTHY J , YOON MEEYOUNG H
IPC: H01L21/4763 , H01L21/768
CPC classification number: H01L21/76849 , H01L21/76807 , H01L21/76814 , H01L21/76831 , H01L21/76843 , H01L2924/0002 , H01L2924/00
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9.INTERCONNECT STRUCTURES WITH ENCASING CAP AND METHODS OF MAKING THEREOF 审中-公开
Title translation: 与EINSCHLIESSUNGSSKAPPE及其生产相关结构过程公开(公告)号:EP1836726A4
公开(公告)日:2010-07-28
申请号:EP05852629
申请日:2005-12-02
Applicant: IBM
Inventor: CLEVENGER LAWRENCE A , DALTON TIMOTHY J , HSU LOUIS C , RADENS CARL J , STANDAERT THEODORUS E , WONG KEITH KWONG HON , YANG CHIH-CHAO
IPC: H01L21/4763
CPC classification number: H01L21/76852 , H01L21/288 , H01L21/2885 , H01L21/76885 , H01L23/5226 , H01L23/53238 , H01L2924/0002 , H01L2924/00
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10.METHOD AND STRUCTURE FOR FORMING SLOT VIA BITLINE FOR MRAM DEVICES 审中-公开
Title translation: 用于通过MRAM器件的位线形成槽的方法和结构公开(公告)号:WO2007016047A3
公开(公告)日:2008-01-03
申请号:PCT/US2006028718
申请日:2006-07-24
Applicant: IBM , GAIDIS MICHAEL C , RADENS CARL , CLEVENGER LAWRENCE A , DALTON TIMOTHY J , HSU LOUIS L C , WONG KEITH KWONG HON , YANG CHIH-CHAO
Inventor: GAIDIS MICHAEL C , RADENS CARL , CLEVENGER LAWRENCE A , DALTON TIMOTHY J , HSU LOUIS L C , WONG KEITH KWONG HON , YANG CHIH-CHAO
IPC: H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113 , H01L31/119
CPC classification number: B82Y10/00 , H01L27/222 , H01L43/12
Abstract: A magnetic random access memory (MRAM) device includes a magnetic tunnel junction (MTJ) stack formed over a lower wiring level, a hardmask formed on the MTJ stack, and an upper wiring level formed over the hardmask. The upper wiring level includes a slot via bitline formed therein, the slot via bitline in contact with the hardmask and in contact with an etch stop layer partially surrounding sidewalls of the hardmask.
Abstract translation: 磁性随机存取存储器(MRAM)器件包括形成在下布线层上的磁隧道结(MTJ)堆叠,形成在MTJ堆叠上的硬掩模和形成在硬掩模上的上布线层。 上布线层包括经由位于其中的位线的槽,槽经由与硬掩模接触的位线并与部分地围绕硬掩模的侧壁的蚀刻停止层接触。
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