公开(公告)号：CA1187201A

公开(公告)日：1985-05-14

申请号：CA400594

申请日：1982-04-07

Applicant: IBM

Inventor： ZINGHER ARTHUR R

IPC: H05K3/46 ,  H01L21/00 ,  H01L21/66 ,  H05K1/02 ,  H05K1/03 ,  B32B31/12 ,  B32B31/16

Abstract: INSPECTION OF MULTILAYER CERAMIC CIRCUIT MODULES BY ELECTRICAL INSPECTION OF UNFIRED GREEN SHEETS A method of manufacturing packages for LSI chips starts with the usual steps of punching holes in green sheets, screening patterning paste (adapted to form cermet conductors or the like after firing) onto the green sheets, and inspecting the green sheets optically. Here, subsets of green sheets are then stacked and compressed into sublaminates. The sublaminates are then functionally inspected electrically. Inspection is done by means of electromechanical contact, scanning electron microscope like techniques, or by other means of irradiating the conductors to energize them for electrical measurement. Measurement may be made between pairs of terminals on only one side of the device being tested, or on both sides of the device. Beams can be applied both top and bottom from a single source or plural sources. Measuring instruments employ various electromechanical techniques as well as electrons, light used photoelectrically, ions, or pneumatic ion jets. Secondary electrons can measure the specimen's potential locally or change its charge. This method can also be employed for the purpose of inspecting other multilayer structures (such as large multilayer printed circuits formed on a plastic base) prior to final assembly of the conductors and the various substrates into a laminated support for electrical circuits. This testing process can also be applied after firing of patterned green sheets prior to plating, as well as after plating.

公开(公告)号：DE69123281D1

公开(公告)日：1997-01-09

申请号：DE69123281

申请日：1991-03-20

Applicant: IBM

Inventor： GRUBER PETER ALFRED ,  ZINGHER ARTHUR R

IPC: F28F3/12 ,  F28F27/02 ,  H01L23/433 ,  H01L23/473 ,  H05K7/20

Abstract: A cooling hat for transferring heat from a surface (48) plurality of heat generating components to a flowing fluid includes a coldsheet (14), a plurality of manifold layers (20) and springs (66). The coldsheet is typically a medium-thin metal sheet usually with fine fins (56) or grooves (58) to readily transfer heat to a coolant. Each manifold layer is typically molded rubber with conduits for coolant supply and return. The conduits form a branched hierarchy. The fluid flow is highly parallel and streamlined which achieves ample flow with small hydraulic differential pressure. Springs gently urge the cooling hat against the thermal joints hence against the components. The hat can bend slightly to conform to a curved surface. Typically some compliance is provided by the hat, and other compliance is provided by a thermal joint between each component and the coldsheet. The system is highly self-aligned for counteracting variations.

公开(公告)号：DE69015491D1

公开(公告)日：1995-02-09

申请号：DE69015491

申请日：1990-06-16

Applicant: IBM

Inventor： BOOTH RICHARD B ,  GRUBE GARY W ,  GRUBER PETER A ,  KHANDROS IGOR Y ,  ZINGHER ARTHUR R

IPC: H05K7/20 ,  B22F1/02 ,  B23K35/20 ,  B23K35/22 ,  B23K35/26 ,  C22C1/02 ,  H01L23/36 ,  H01L23/373

Abstract: A liquid metal matrix thermal paste comprises a dispersion of non-reacting thermally conductive particles (12) in a low melting temperature liquid metal matrix (14). The particles preferably are silicon, molybdenum, tungsten or other materials which do not react with gallium at temperatures below approximately 100 DEG C. The preferred liquid metals are gallium and indium eutectic, gallium and tin eutectic and gallium, indium and tin ternary, eutectic. The particles (12) may be coated with a noble metal to minimize surface oxidation and enhance wettability of the particles. The liquid metal matrix thermal paste is used as a high thermally conducting paste in cooling high power dissipation components in conjunction with a conventional fluid cooling system.

公开(公告)号：DE69401023D1

公开(公告)日：1997-01-16

申请号：DE69401023

申请日：1994-02-23

Applicant: IBM

Inventor： BASEMAN ROBERT JEFFREY ,  BROWN CHARLES ALLAN ,  ELDRIDGE BENJAMIN NILES ,  ROTHMAN LAURA BETH ,  WENDT HERMAN RUSSEL ,  YEH JAMES TIEN-CHENG ,  ZINGHER ARTHUR R

IPC: B65D85/86 ,  B65G1/00 ,  H01L21/673 ,  H01L21/677 ,  H05K13/00

Abstract: During wafer fabrication, a transportable enclosure, such as a Standard Manufacturing InterFace (SMIF) pod encloses a nascent product, such as a semiconductor wafer, to protect the wafer against contamination during manufacture, storage or transportation. However chemical vapors emitted inside the pod can accumulate in the air and degrade wafers during subsequent fabrication. In order to absorb the vapors inside a closed pod, a vapor removal element typically including an activated carbon absorber, covered by a particulate-filtering vapor-permeable barrier, and covered by a guard plate with holes is disposed within the enclosure. A vapor removal element is disposed closely adjacent to each respective wafer. Alternatively, a single vapor removal element is located inside the enclosure. In certain instances, a fan or thermo-buoyant circulation causes any vapors located inside the enclosure to a vapor removal element for removal. Alternatively a porous vapor removal element may be disposed for removing vapors from air entering the enclosure. In another embodiment a vapor removal element is integrated with the back face of each wafer.

公开(公告)号：DE69015491T2

公开(公告)日：1995-07-20

申请号：DE69015491

申请日：1990-06-16

Applicant: IBM

Inventor： BOOTH RICHARD B ,  GRUBE GARY W ,  GRUBER PETER A ,  KHANDROS IGOR Y ,  ZINGHER ARTHUR R

IPC: H05K7/20 ,  B22F1/02 ,  B23K35/20 ,  B23K35/22 ,  B23K35/26 ,  C22C1/02 ,  H01L23/36 ,  H01L23/373

Abstract: A liquid metal matrix thermal paste comprises a dispersion of non-reacting thermally conductive particles (12) in a low melting temperature liquid metal matrix (14). The particles preferably are silicon, molybdenum, tungsten or other materials which do not react with gallium at temperatures below approximately 100 DEG C. The preferred liquid metals are gallium and indium eutectic, gallium and tin eutectic and gallium, indium and tin ternary, eutectic. The particles (12) may be coated with a noble metal to minimize surface oxidation and enhance wettability of the particles. The liquid metal matrix thermal paste is used as a high thermally conducting paste in cooling high power dissipation components in conjunction with a conventional fluid cooling system.

公开(公告)号：BR8702439A

公开(公告)日：1988-02-23

申请号：BR8702439

申请日：1987-05-13

Applicant: IBM

Inventor： JACOBS SCOTT L ,  NIHAL PERWAIZ ,  OZMAT BURHAN ,  SCHNURMANN HENRI D ,  ZINGHER ARTHUR R

IPC: H01L23/12 ,  H01L23/50 ,  H01L23/538 ,  H01L23/30

Abstract: An integrated circuit chip packaging structure, preferably having a semiconductor base substrate (1), i.e., silicon or gallium arsenide, alternating insulation and conductive layers on the base structure, at least two conductive layers (8) being patterned into thin film wiring (i.e., thin film copper of approximately 5 microns), semiconductor integrated circuit chips connected to the upper-most patterned conductive layer, and means to connect the packaging structure to the next level of packaging (i.e., board or card). The thin film wiring layers typically each have coplanar ground, power (39, 40) and signal lines (19, 20), with at least one power (16) or ground line existing between coplanar signal lines to minimize cross talk. To facilitate efficient power distribution, lines of specific power levels of the patterned planes are connected to lines of the same power level on other patterned planes to form three dimensional power planes. To reduce package capacitance and keep the RC constant low, a personalized reference plane is incorporated. The personalized plane has insulating regions extending at least partially through the plane at predetermined locations that coincide with long signal lines on the wiring layers. The combined package provides a packaging alternative that has excellent electrical performance (i.e., speed, low RC constant, efficient power distribution), high density and thermal expansion matching between the underlying semiconductor structure and semiconductor chips mounted on the package. A high yield process for manufacturing the package is also disclosed.

公开(公告)号：CA2018930A1

公开(公告)日：1991-02-08

申请号：CA2018930

申请日：1990-06-13

Applicant: IBM

Inventor： BOOTH RICHARD B ,  GRUBE GARY W ,  GRUBER PETER A ,  KHANDROS IGOR Y ,  ZINGHER ARTHUR R

IPC: H05K7/20 ,  B22F1/02 ,  B23K35/20 ,  B23K35/22 ,  B23K35/26 ,  C22C1/02 ,  H01L23/36 ,  H01L23/373

Abstract: A liquid metal matrix thermal paste comprises a dispersion of non-reacting thermally conductive particles (12) in a low melting temperature liquid metal matrix (14). The particles preferably are silicon, molybdenum, tungsten or other materials which do not react with gallium at temperatures below approximately 100 DEG C. The preferred liquid metals are gallium and indium eutectic, gallium and tin eutectic and gallium, indium and tin ternary, eutectic. The particles (12) may be coated with a noble metal to minimize surface oxidation and enhance wettability of the particles. The liquid metal matrix thermal paste is used as a high thermally conducting paste in cooling high power dissipation components in conjunction with a conventional fluid cooling system.

公开(公告)号：CA1277434C

公开(公告)日：1990-12-04

申请号：CA534157

申请日：1987-04-08

Applicant: IBM

Inventor： JACOBS SCOTT L ,  NIHAL PERWAIZ ,  OZMAT BURHAN ,  SCHNURMANN HENRI D ,  ZINGHER ARTHUR R

IPC: H01L23/12 ,  H01L23/50 ,  H01L23/538

Abstract: MODULE FOR PACKAGING SEMICONDUCTOR INTEGRATED CIRCUIT CHIPS ON A BASE SUBSTRATE An integrated circuit chip packaging structure, preferably having a semiconductor base substrate, i.e., silicon or gallium arsenide, alternating insulation and conductive layers on the base structure, at least two conductive layers being patterned into thin film wiring (i.e., thin film copper of approximately 5 microns), semiconductor integrated circuit chips connected to the upper-most patterned conductive layer, and means to connect the packaging structure to the next level of packaging (i.e., board or card). The thin film wiring layers typically each have coplanar ground, power and signal lines, with at least one power or ground line existing between coplanar signal lines to minimize cross talk. To facilitate efficient power distribution, lines of specific power levels of the patterned planes are connected to lines of the same power level on other patterned planes to form three dimensional power planes. To reduce package capacitance and keep the RC constant low, a personalized reference plane is incorporated. The personalized plane has insulating regions extending at least partially through the plane at predetermined locations that coincide with long signal lines on the wiring layers. The combined package provides a packaging alternative that has excellent electrical performance (i.e., speed; low RC constant, efficient power distribution), high density and thermal expansion matching between the underlying semiconductor structure and semiconductor chips mounted on the package. A high yield process for manufacturing the package is also disclosed.