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公开(公告)号:JP2000243213A
公开(公告)日:2000-09-08
申请号:JP2000046289
申请日:2000-02-23
Applicant: INFINEON TECHNOLOGIES CORP , IBM
Inventor: WEBER STEFAN J , IGGULDEN ROY , NARAYAN CHANDRASEKHAR , BRINTZINGER AXEL CHRISTOPH , HOINKIS MARK , VAN DEN BERG ROBERT
IPC: H01H85/00 , H01H69/02 , H01L21/82 , H01L23/525
Abstract: PROBLEM TO BE SOLVED: To provide a method for shrinking an area for a fuse to occupy on a semiconductor tip, and to adjust a fuse resistance relative to a fuse of a semiconductor device. SOLUTION: A fuse for a semiconductor is formed, so as to have a substrate 12 having a conductive passage disposed on its surface, a dielectric layer 14 disposed on the substrate, and a vertical fuse 110 vertically disposed on the surface. The vertical fuse penetrates through the dielectric layer 14 and is connected to the conductive passage. The vertical fuse also has a hole 108, a liner material is disposed on its vertical surface, and the fuse is cut off with fusing of the liner material along the vertical surface.
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公开(公告)号:DE60142482D1
公开(公告)日:2010-08-12
申请号:DE60142482
申请日:2001-08-24
Applicant: INFINEON TECHNOLOGIES CORP , IBM
Inventor: IGGULDEN ROY , WEBER STEFAN
IPC: H01L21/768 , H01L23/522 , H01L23/532
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公开(公告)号:DE10244570B4
公开(公告)日:2007-08-16
申请号:DE10244570
申请日:2002-09-25
Applicant: INFINEON TECHNOLOGIES AG , IBM
Inventor: IGGULDEN ROY , ROBL WERNER , SHAFER PADRAIC , WONG KWONG HON
IPC: H01L21/283 , H01L21/768 , H01L23/532
Abstract: The method of filling a damascene structure with liner and tungsten involves coating damascene structure by liner providing poor step coverage, depositing tungsten by chemical vapor deposition, and performing metal isolation process. The resulting damascene structure has improved resistance, resistance spread and favorable adhesion.
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公开(公告)号:DE10244570A1
公开(公告)日:2003-04-30
申请号:DE10244570
申请日:2002-09-25
Applicant: INFINEON TECHNOLOGIES AG , IBM
Inventor: IGGULDEN ROY , ROBL WERNER , SHAFER PADRAIC , WONG KWONG HON
IPC: H01L21/768 , H01L21/283 , H01L23/532
Abstract: The method of filling a damascene structure with liner and tungsten involves coating damascene structure by liner providing poor step coverage, depositing tungsten by chemical vapor deposition, and performing metal isolation process. The resulting damascene structure has improved resistance, resistance spread and favorable adhesion.
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公开(公告)号:DE60034611T2
公开(公告)日:2008-01-31
申请号:DE60034611
申请日:2000-02-04
Applicant: QIMONDA AG , IBM
Inventor: WEBER STEFAN J , IGGULDEN ROY , NARAYAN CHANDRASEKHAR , BRINTZINGER AXEL CHRISTOPH , HOINKIS MARK , VAN DEN BERG ROBERT
IPC: H01H85/00 , H01H69/02 , H01L23/525 , H01L21/82
Abstract: A fuse for semiconductor devices in accordance with the present invention includes a substrate having a conductive path disposed on a surface thereof, a dielectric layer disposed on the substrate and a vertical fuse disposed perpendicularly to the surface through the dielectric layer and connecting to the conductive path, the vertical fuse forming a cavity having a liner material disposed along vertical surfaces of the cavity, the vertical surfaces being melted to blow the fuse. Methods for fabrication of the vertical fuse are also included.
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公开(公告)号:DE60034611D1
公开(公告)日:2007-06-14
申请号:DE60034611
申请日:2000-02-04
Applicant: IBM , INFINEON TECHNOLOGIES AG
Inventor: WEBER STEFAN J , IGGULDEN ROY , NARAYAN CHANDRASEKHAR , BRINTZINGER AXEL CHRISTOPH , HOINKIS MARK , VAN DEN BERG ROBERT
IPC: H01H85/00 , H01H69/02 , H01L23/525 , H01L21/82
Abstract: A fuse for semiconductor devices in accordance with the present invention includes a substrate having a conductive path disposed on a surface thereof, a dielectric layer disposed on the substrate and a vertical fuse disposed perpendicularly to the surface through the dielectric layer and connecting to the conductive path, the vertical fuse forming a cavity having a liner material disposed along vertical surfaces of the cavity, the vertical surfaces being melted to blow the fuse. Methods for fabrication of the vertical fuse are also included.
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