公开(公告)号：JP2007027749A

公开(公告)日：2007-02-01

申请号：JP2006194041

申请日：2006-07-14

Applicant: Infineon Technologies Ag ,  インフィネオン テクノロジーズ アクチエンゲゼルシャフト

Inventor： DUPONT AUDREY ,  SCHUPKE KRISTIN ,  JAKSCHIK STEFAN ,  AVELLAN ALEJANDRO

IPC: H01L21/308 ,  H01L21/8242 ,  H01L27/108

CPC classification number: H01L21/31111 ,  C09K13/08

Abstract: PROBLEM TO BE SOLVED: To provide a solution suitable for wet treatment of high dielectric-constant materials containing hafnium.
SOLUTION: A solution for wet treatment of a hafnium-containing layer such as HfO2, HfO2/Al2O3, HfO2/SiO2, HfSiOx or HfAlOx, etc. is characterized by containing hydrofluoric acid and at least one substance that is an organic substance with low ionic strength and selected from a group comprising ethylene glycol, polyglycol, and acetate glycol.
COPYRIGHT: (C)2007,JPO&INPIT

Abstract translation: 要解决的问题：提供适用于湿法处理含有铪的高介电常数材料的溶液。 解决方案：用于湿法处理HfO 2，HfO 2 / Al 2 O 3，HfO 2 / SiO 2，HfSiO x或HfAlO x等含铪层的溶液的特征在于含有氢氟酸和至少一种有机物质 具有低离子强度并且选自包括乙二醇，聚乙二醇和乙酸酯二醇的组。 版权所有（C）2007，JPO＆INPIT

公开(公告)号：JP2006295196A

公开(公告)日：2006-10-26

申请号：JP2006111855

申请日：2006-04-14

Applicant: Infineon Technologies Ag ,  インフィネオン テクノロジーズ アクチエンゲゼルシャフト

Inventor： AVELLAN ALEJANDRO ,  HECHT THOMAS ,  JAKSCHIK STEFAN ,  SCHROEDER UWE

IPC: H01L27/108 ,  H01L21/8242 ,  H01L29/78

CPC classification number: H01L28/65 ,  H01L27/1087 ,  H01L29/66181

Abstract: PROBLEM TO BE SOLVED: To provide a method for manufacturing an electronic element such as a DRAM semiconductor memory with which proper capacitor characteristics or recording characteristics can be obtained even if the capacitor structure is very small, or a field effect transistor.
SOLUTION: In a method for manufacturing an electronic element in which a dielectric (130) and at least one capacitor (150) having at least one connection electrode (120, 140) are formed, particularly, a DRAM semiconductor memory or a field effect transistor, in order to create a capacitor to obtain optimum capacitor characteristics even if the capacitor structure is very small, the dielectric (130) or the connection electrode (120, 140) is formed such that the occurrence of transient polarization is suppressed or at least reduced.
COPYRIGHT: (C)2007,JPO&INPIT

Abstract translation: 要解决的问题：提供一种用于制造诸如DRAM半导体存储器的电子元件的方法，即使电容器结构非常小也能够获得适当的电容器特性或记录特性，或场效应晶体管。 解决方案：在制造其中形成电介质（130）和至少一个具有至少一个连接电极（120,140）的电容器（150）的电子元件的方法中，特别地，DRAM半导体存储器或 场效应晶体管，为了形成电容器以获得最佳的电容器特性，即使电容器结构非常小，电介质（130）或连接电极（120,140）形成为使得瞬态极化的发生被抑制或 至少减少 版权所有（C）2007，JPO＆INPIT

公开(公告)号：DE102005018029A1

公开(公告)日：2006-10-26

申请号：DE102005018029

申请日：2005-04-14

Applicant: INFINEON TECHNOLOGIES AG

Inventor： JAKSCHIK STEFAN ,  SCHROEDER UWE ,  HECHT THOMAS ,  AVELLAN ALEJANDRO

IPC: H01L21/8242

Abstract: An electrical component, such as a DRAM semiconductor memory or a field-effect transistor is fabricated. At least one capacitor having a dielectric (130) and at least one connection electrode (120, 140) are fabricated. To enable the capacitors fabricated to have optimum storage properties even for very small capacitor structures, the dielectric (130) or the connection electrode (120, 140) are formed in such a manner that transient polarization effects are prevented or at least reduced.

公开(公告)号：DE102005024855A8

公开(公告)日：2007-03-08

申请号：DE102005024855

申请日：2005-05-31

Applicant: INFINEON TECHNOLOGIES AG

Inventor： JAKSCHIK STEFAN ,  AVELLAN ALEJANDRO ,  SCHROEDER UWE ,  ORTH ANDREAS ,  GOLDBACH MATTHIAS ,  STORBECK OLAF ,  STADTMUELLER MICHAEL ,  HECHT THOMAS

IPC: H01L21/8242

Abstract: Memory and method for fabricating it A memory formed as an integrated circuit in a semiconductor substrate and having storage capacitors and switching transistors. The storage capacitors are formed in the semiconductor substrate in a trench and have an outer electrode layer, which is formed around the trench, a dielectric intermediate layer, which is embodied on the trench wall, and an inner electrode layer, with which the trench is essentially filled, and the switching transistors are formed in the semiconductor substrate in a surface region and have a first source/drain doping region, a second source/drain doping region and an intervening channel, which is separated from a gate electrode by an insulator layer.

公开(公告)号：DE102005024855A1

公开(公告)日：2006-12-07

申请号：DE102005024855

申请日：2005-05-31

Applicant: INFINEON TECHNOLOGIES AG

Inventor： JASCHIK STEFAN ,  AVELLAN ALEJANDRO ,  SCHROEDER UWE ,  ORTH ANDREAS ,  GOLDBACH MATTHIAS ,  STORBECK OLAF ,  STADTMUELLER MICHAEL ,  HECHT THOMAS

IPC: H01L21/8242

Abstract: Memory and method for fabricating it A memory formed as an integrated circuit in a semiconductor substrate and having storage capacitors and switching transistors. The storage capacitors are formed in the semiconductor substrate in a trench and have an outer electrode layer, which is formed around the trench, a dielectric intermediate layer, which is embodied on the trench wall, and an inner electrode layer, with which the trench is essentially filled, and the switching transistors are formed in the semiconductor substrate in a surface region and have a first source/drain doping region, a second source/drain doping region and an intervening channel, which is separated from a gate electrode by an insulator layer.