公开(公告)号：JP2006295196A

公开(公告)日：2006-10-26

申请号：JP2006111855

申请日：2006-04-14

Applicant: Infineon Technologies Ag ,  インフィネオン テクノロジーズ アクチエンゲゼルシャフト

Inventor： AVELLAN ALEJANDRO ,  HECHT THOMAS ,  JAKSCHIK STEFAN ,  SCHROEDER UWE

IPC: H01L27/108 ,  H01L21/8242 ,  H01L29/78

CPC classification number: H01L28/65 ,  H01L27/1087 ,  H01L29/66181

Abstract: PROBLEM TO BE SOLVED: To provide a method for manufacturing an electronic element such as a DRAM semiconductor memory with which proper capacitor characteristics or recording characteristics can be obtained even if the capacitor structure is very small, or a field effect transistor.
SOLUTION: In a method for manufacturing an electronic element in which a dielectric (130) and at least one capacitor (150) having at least one connection electrode (120, 140) are formed, particularly, a DRAM semiconductor memory or a field effect transistor, in order to create a capacitor to obtain optimum capacitor characteristics even if the capacitor structure is very small, the dielectric (130) or the connection electrode (120, 140) is formed such that the occurrence of transient polarization is suppressed or at least reduced.
COPYRIGHT: (C)2007,JPO&INPIT

Abstract translation: 要解决的问题：提供一种用于制造诸如DRAM半导体存储器的电子元件的方法，即使电容器结构非常小也能够获得适当的电容器特性或记录特性，或场效应晶体管。 解决方案：在制造其中形成电介质（130）和至少一个具有至少一个连接电极（120,140）的电容器（150）的电子元件的方法中，特别地，DRAM半导体存储器或 场效应晶体管，为了形成电容器以获得最佳的电容器特性，即使电容器结构非常小，电介质（130）或连接电极（120,140）形成为使得瞬态极化的发生被抑制或 至少减少 版权所有（C）2007，JPO＆INPIT

公开(公告)号：DE102005018029A1

公开(公告)日：2006-10-26

申请号：DE102005018029

申请日：2005-04-14

Applicant: INFINEON TECHNOLOGIES AG

Inventor： JAKSCHIK STEFAN ,  SCHROEDER UWE ,  HECHT THOMAS ,  AVELLAN ALEJANDRO

IPC: H01L21/8242

Abstract: An electrical component, such as a DRAM semiconductor memory or a field-effect transistor is fabricated. At least one capacitor having a dielectric (130) and at least one connection electrode (120, 140) are fabricated. To enable the capacitors fabricated to have optimum storage properties even for very small capacitor structures, the dielectric (130) or the connection electrode (120, 140) are formed in such a manner that transient polarization effects are prevented or at least reduced.

公开(公告)号：DE10142580B4

公开(公告)日：2006-07-13

申请号：DE10142580

申请日：2001-08-31

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SEIDL HARALD ,  GUTSCHE MARTIN ,  HECHT THOMAS ,  LEONHARDT MATTHIAS ,  SCHROEDER UWE

IPC: H01L21/8242

公开(公告)号：DE10357756B4

公开(公告)日：2006-03-09

申请号：DE10357756

申请日：2003-12-10

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HECHT THOMAS ,  SCHROEDER UWE ,  JAKSCHIK STEFAN

IPC: C23C16/00 ,  C23C16/30 ,  C23C16/455 ,  H01L21/314 ,  H01L21/8242

Abstract: Production of metal oxynitride layers comprises depositing a chemically reactive metal compound on the surface of a substrate in the gas phase and reacting with nitrogen oxide and/or dinitrogen monoxide. The metal oxynitride is not silicon oxynitride (SiON). An independent claim is also included for a metal oxynitride layer produced by the above process.

公开(公告)号：DE10121778B4

公开(公告)日：2005-12-01

申请号：DE10121778

申请日：2001-05-04

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HAUPT MORITZ ,  MORGENSCHWEIS ANJA ,  OTTENWAELDER DIETMAR ,  SCHROEDER UWE

IPC: H01L21/223 ,  H01L21/8242

公开(公告)号：DE10319843A1

公开(公告)日：2004-12-02

申请号：DE10319843

申请日：2003-05-03

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HECHT THOMAS ,  SCHROEDER UWE ,  MANTZ ULRICH ,  JAKSCHIK STEFAN ,  ORTH ANDREAS

IPC: G01B11/22 ,  G01J3/453 ,  G01N21/21 ,  G01J1/20 ,  H01L21/66

Abstract: The blind bores depth measurement system uses interference effects. It has an IR source sending radiation (S) to a Michelson interferometer (10) with a beam splitter (13) at a 45 degree angle and two mirrors (11,12). The IR leaving the Michelson interferometer passes through a polarizer (21) and impinges on the workpiece (1) at a 45 degree angle. IR reflected from the workpiece passes through a second polarizer (22) to an IR detector (15).

公开(公告)号：DE10130936B4

公开(公告)日：2004-04-29

申请号：DE10130936

申请日：2001-06-27

Applicant: INFINEON TECHNOLOGIES AG

Inventor： REISINGER HANS ,  GUTSCHE MARTIN ,  SCHUPKE KRISTIN ,  JAKSCHIK STEFAN ,  LEONHARDT MATTHIAS ,  SEIDL HARALD ,  SCHROEDER UWE ,  HECHT THOMAS

IPC: C23C16/02 ,  C23C16/44 ,  C23C16/455 ,  H01L21/306 ,  H01L21/316 ,  H01L21/8242 ,  C30B29/16

Abstract: The present invention provides a method for fabricating a semiconductor component having a substrate (1) and a dielectric layer (70) provided on or in the substrate (1), the dielectric layer (7) being deposited in alternating self-limiting monolayer form, in the form of at least two different precursors, by means of an ALD process. There is provision for conditioning of the surface of the substrate (1) prior to the deposition of a first monolayer of a first precursor with respect to a reactive ligand of the first precursor.

公开(公告)号：DE10240106A1

公开(公告)日：2004-03-11

申请号：DE10240106

申请日：2002-08-30

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HECHT THOMAS ,  SCHROEDER UWE ,  SEIDL HARALD ,  GUTSCHE MARTIN ,  JAKSCHIK STEFAN ,  KUDELKA STEPHAN ,  BIRNER ALBERT

IPC: H01L21/02 ,  H01L21/28 ,  H01L21/311 ,  H01L21/316 ,  H01L21/768 ,  H01L21/8246 ,  H01L27/115 ,  H01L29/08 ,  H01L29/49 ,  H01L21/283 ,  H01L21/8242

Abstract: Etching process for removing material from semiconductor wafers comprises preparing a semiconductor wafer as substrate, providing an etching signal layer (2) on sections of the substrate surface, providing a process layer (3) on sections of the etching signal layer, removing sections of the process layer, producing an etching signal during exposure of the removed sections of the etching signal layer lying below the process layer, and stopping the etching process depending on the etching signals. The etching signal layer is formed by sequential gas phase deposition or molecular beam epitaxy as dielectric layer made from a metal oxide or rare earth oxide. An Independent claim is also included for an etching signal layer.

公开(公告)号：DE10130936A1

公开(公告)日：2003-01-16

申请号：DE10130936

申请日：2001-06-27

Applicant: INFINEON TECHNOLOGIES AG

Inventor： REISINGER HANS ,  GUTSCHE MARTIN ,  SCHUPKE KRISTIN ,  JAKSCHIK STEFAN ,  LEONHARDT MATTHIAS ,  SEIDL HARALD ,  SCHROEDER UWE ,  HECHT THOMAS

IPC: C23C16/02 ,  C23C16/44 ,  C23C16/455 ,  H01L21/306 ,  H01L21/316 ,  H01L21/8242 ,  C30B29/16

Abstract: Process for producing a semiconductor element having a dielectric layer (70) deposited on a substrate (1) in a monolayer alternately in the form of at least two different precursors using an ALD process comprises conditioning of the surface of the substrate before deposition of the first monolayer of a first precursor with regard to a reactive ligand of the first precursor. Preferred Features: A silicon oxide layer is removed from the surface of the substrate during conditioning. OH-, H- or H2-conditioning of the surface of the substrate is carried out.

公开(公告)号：DE10121778A1

公开(公告)日：2002-11-21

申请号：DE10121778

申请日：2001-05-04

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HAUPT MORITZ ,  MORGENSCHWEIS ANJA ,  OTTENWAELDER DIETMAR ,  SCHROEDER UWE

IPC: H01L21/223 ,  H01L21/8242

Abstract: Improving a doping profile during gas phase doping comprises preparing a semiconductor substrate; introducing silicon nitride and/or decomposition products of silicon nitride deposition in a process chamber; and gas phase doping in the chamber. Preferred Features: Ammonium chloride crystals are introduced into the process chamber together with small amounts of HCl and/or NH3. Gas phase doping is carried out in a pressure region of 13.33 Pa to 133.3 kPa and in a temperature region of 800-1100 deg C. Arsenic, phosphorus or boron gas doping is carried out. A trench is formed in the substrate and an insulating collar in an upper region of the trench.