公开(公告)号：WO02089190A3

公开(公告)日：2003-01-09

申请号：PCT/DE0201321

申请日：2002-04-10

Applicant: INFINEON TECHNOLOGIES AG ,  MATTSON THERMAL PRODUCTS GMBH ,  FRIGGE STEFFEN ,  KEGEL WILHELM ,  SACHSE JENS-UWE ,  STADTMUELLER MICHAEL ,  HAYN REGINA ,  ROTERS GEORG ,  SCHOER ERWIN ,  STORBECK OLAF

Inventor： FRIGGE STEFFEN ,  KEGEL WILHELM ,  SACHSE JENS-UWE ,  STADTMUELLER MICHAEL ,  HAYN REGINA ,  ROTERS GEORG ,  SCHOER ERWIN ,  STORBECK OLAF

IPC: H01L21/28 ,  H01L21/321 ,  H01L29/423 ,  H01L29/49 ,  H01L29/78

CPC classification number: H01L21/32105 ,  H01L21/28061

Abstract: In selective oxidation of gate structures known per se, which contain a polycrystalline silicon layer and a tungsten layer, tungsten oxide evaporation is prevented or at least substantially reduced by means of a special process control, whereby the gate structure is exposed to a non-aqueous inert gas containing hydrogen before and optionally after a treatment step with a hydrogen/water mixture.

Abstract translation: 在包括多晶硅层和钨层是通过特殊工艺控制防止Wolframoxidausdampfung栅极结构的已知的选择性氧化，或至少大大降低。 与氢/水混合物中的处理步骤之后含有之前和任选该非水惰性气体，具有氢的栅极结构，采取行动。

公开(公告)号：DE102018107966B4

公开(公告)日：2022-02-17

申请号：DE102018107966

申请日：2018-04-04

Applicant: INFINEON TECHNOLOGIES AG

Inventor： AICHINGER THOMAS ,  STADTMUELLER MICHAEL ,  RESCHER GERALD

IPC: H01L21/28 ,  H01L21/3105 ,  H01L21/324 ,  H01L21/336 ,  H01L29/423 ,  H01L29/49 ,  H01L29/78

Abstract: Ein Verfahren (100) zum Bilden eines Breiter-Bandabstand-Halbleiter-Bauelements (500), das Verfahren (100) umfassend:Bilden einer Gate-Isolierschicht (110) auf einem Breiter-Bandabstand-Halbleiter-Substrat; undTempern der Gate-Isolierschicht (120) unter Verwendung von zumindest einer ersten Reaktivgasspezies und zumindest einer zweiten Reaktivgasspezies, wobei sich die erste Reaktivgasspezies von der zweiten Reaktivgasspezies unterscheidet, wobei das Tempern der Gate-Isolierschicht (120) in einer Reaktivgasatmosphäre ausgeführt wird, die gleichzeitig zumindest 0,1 Vol.-% der ersten Reaktivgasspezies und zumindest 0,1 Vol.-% der zweiten Reaktivgasspezies umfasst,wobei eine Dauer des Temperns der Gate-Isolierschicht unter Verwendung von Wasserstoff als erste oder zweite Reaktivgasspezies zumindest 20 Minuten und höchstens 600 Minuten ist.

公开(公告)号：DE102004007409A1

公开(公告)日：2005-09-08

申请号：DE102004007409

申请日：2004-02-16

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HAUPT MORITZ ,  FOERSTER MATTHIAS ,  KEGEL WILHELM ,  STADTMUELLER MICHAEL ,  DIETEL ANDREAS ,  STORBECK OLAF ,  GEIDL JOCHEN

IPC: H01L21/763 ,  H01L21/768 ,  H01L21/8242

Abstract: Semiconductor structure manufacturing method has the following steps: provision of a semiconductor substrate (1) with a trench (5) and deposition of a filling layer (10b) of doped silicon to fill the trench and cover the surrounding structure using an over-conforming separation method that has an over-conforming separation rate due to a dosing concentration gradient. This ensures that the trench is at least partially filled from the bottom to the top.

公开(公告)号：DE102018107966A1

公开(公告)日：2019-10-10

申请号：DE102018107966

申请日：2018-04-04

Applicant: INFINEON TECHNOLOGIES AG

Inventor： AICHINGER THOMAS ,  STADTMUELLER MICHAEL ,  RESCHER GERALD

IPC: H01L29/423 ,  H01L21/28 ,  H01L21/336 ,  H01L21/477 ,  H01L29/78

Abstract: Ein Verfahren (100) zum Bilden eines Breiter-Bandabstand-Halbleiter-Bauelements (500) ist bereitgestellt. Das Verfahren (100) umfasst das Bilden einer Gate-Isolierschicht (110) auf einem Breiter-Bandabstand-Halbleiter-Substrat und das Tempern der Gate-Isolierschicht (120) unter Verwendung von zumindest einer ersten Reaktivgasspezies und einer zweiten Reaktivgasspezies, wobei sich die erste Reaktivgasspezies von der zweiten Reaktivgasspezies unterscheidet. Das Verfahren kann das Bilden einer Gate-Elektrode (130) auf der Gate-Isolierschicht nach dem Tempern der Gate-Isolierschicht umfassen.

公开(公告)号：DE102005057255A1

公开(公告)日：2007-06-14

申请号：DE102005057255

申请日：2005-12-01

Applicant: INFINEON TECHNOLOGIES AG

Inventor： BERNHARDT HENRY ,  HECHT THOMAS ,  STADTMUELLER MICHAEL ,  KIM YEONG KWAN ,  KAPTEYN CHRISTIAN ,  SCHROEDER UWE ,  SPITZER ANDREAS

IPC: H01L27/108 ,  H01L21/8242

Abstract: The capacitor has a first electrode layer (103), a second electrode layer (104,105) and a dielectric intermediate layer (110) between the electrode layers. The dielectric layer contains a high k dielectric and at least one component containing silicon. Independent claims also cover a method of manufacture.

公开(公告)号：DE102005057255B4

公开(公告)日：2007-09-20

申请号：DE102005057255

申请日：2005-12-01

Applicant: INFINEON TECHNOLOGIES AG

Inventor： BERNHARDT HENRY ,  HECHT THOMAS ,  STADTMUELLER MICHAEL ,  KIM YEONG KWAN ,  KAPTEYN CHRISTIAN ,  SCHROEDER UWE ,  SPITZER ANDREAS

IPC: H01L27/108 ,  H01L21/8242

Abstract: The capacitor has a first electrode layer (103), a second electrode layer (104,105) and a dielectric intermediate layer (110) between the electrode layers. The dielectric layer contains a high k dielectric and at least one component containing silicon. Independent claims also cover a method of manufacture.

公开(公告)号：DE10120523A1

公开(公告)日：2002-10-31

申请号：DE10120523

申请日：2001-04-26

Applicant: INFINEON TECHNOLOGIES AG ,  MATTSON THERMAL PRODUCTS GMBH

Inventor： HAYN REGINA ,  SACHSE JENS-UWE ,  SCHOER ERWIN ,  KEGEL WILHELM ,  STORBECK OLAF ,  STADTMUELLER MICHAEL ,  ROTERS GEORG ,  FRIGGE STEFFEN

IPC: H01L21/28 ,  H01L21/321 ,  H01L29/423 ,  H01L29/49 ,  H01L29/78 ,  H01L21/336

Abstract: In selective oxidation of gate structures known per se, which contain a polycrystalline silicon layer and a tungsten layer, tungsten oxide evaporation is prevented or at least substantially reduced by means of a special process control, whereby the gate structure is exposed to a non-aqueous inert gas containing hydrogen before and optionally after a treatment step with a hydrogen/water mixture.

公开(公告)号：DE50211205D1

公开(公告)日：2007-12-27

申请号：DE50211205

申请日：2002-04-10

Applicant: INFINEON TECHNOLOGIES AG ,  MATTSON THERMAL PRODUCTS GMBH

Inventor： FRIGGE STEFFEN ,  KEGEL WILHELM ,  SACHSE JENS-UWE ,  STADTMUELLER MICHAEL ,  HAYN REGINA ,  ROTERS GEORG ,  SCHOER ERWIN ,  STORBECK OLAF

IPC: H01L21/28 ,  H01L21/321 ,  H01L29/423 ,  H01L29/49 ,  H01L29/78

Abstract: During a selective oxidation of gate structures that includes a polycrystalline silicon layer and a tungsten layer, which is known per se, a vapor deposition of tungsten oxide is prevented or at least greatly reduced by a special process. The gate structure is acted on by a hydrogen-containing, nonaqueous inert gas before and, if appropriate, after a treatment step with a hydrogen/water mixture.

公开(公告)号：DE102005024855A8

公开(公告)日：2007-03-08

申请号：DE102005024855

申请日：2005-05-31

Applicant: INFINEON TECHNOLOGIES AG

Inventor： JAKSCHIK STEFAN ,  AVELLAN ALEJANDRO ,  SCHROEDER UWE ,  ORTH ANDREAS ,  GOLDBACH MATTHIAS ,  STORBECK OLAF ,  STADTMUELLER MICHAEL ,  HECHT THOMAS

IPC: H01L21/8242

Abstract: Memory and method for fabricating it A memory formed as an integrated circuit in a semiconductor substrate and having storage capacitors and switching transistors. The storage capacitors are formed in the semiconductor substrate in a trench and have an outer electrode layer, which is formed around the trench, a dielectric intermediate layer, which is embodied on the trench wall, and an inner electrode layer, with which the trench is essentially filled, and the switching transistors are formed in the semiconductor substrate in a surface region and have a first source/drain doping region, a second source/drain doping region and an intervening channel, which is separated from a gate electrode by an insulator layer.

公开(公告)号：DE102004007409B4

公开(公告)日：2006-06-01

申请号：DE102004007409

申请日：2004-02-16

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HAUPT MORITZ ,  FOERSTER MATTHIAS ,  KEGEL WILHELM ,  STADTMUELLER MICHAEL ,  DIETEL ANDREAS ,  STORBECK OLAF ,  GEIDL JOCHEN

IPC: H01L21/763 ,  H01L21/768 ,  H01L21/8242