公开(公告)号：JP2006148122A

公开(公告)日：2006-06-08

申请号：JP2005335579

申请日：2005-11-21

Applicant: Infineon Technologies Ag ,  インフィネオン テクノロジーズ アクチエンゲゼルシャフト

Inventor： BACHMANN JENS ,  DONOHUE LEE ,  EFFERENN DIRK ,  GOTTZEIN RONALD ,  KAHLER UWE ,  LIN CHUNG-HSIN ,  LIN WEN-BIN

IPC: H01L21/304 ,  H01L21/3065

CPC classification number: G03F7/427 ,  C23G5/00 ,  H01J37/32192 ,  H01J2237/3342 ,  H01L21/02071

Abstract: PROBLEM TO BE SOLVED: To provide a method for removing residues containing a polymer resist and a metal oxide from a metal structure on a semiconductor substrate, in the semiconductor substrate on which metal wiring is formed.
SOLUTION: The method includes a heating step (a) of heating the substrate having the metal structure under the presence of nitrogen (N
2 ), a stabilizing step (b) of stabilizing under the presence of pure nitrogen (N
2 ), a passivating step (c) of passivating by using a plasma containing at least one of water, nitrogen and oxygen, and an exfoliating step (d) using oxygen to remove the residue containing the resist.
COPYRIGHT: (C)2006,JPO&NCIPI

Abstract translation: 要解决的问题：提供一种在形成金属布线的半导体衬底中从半导体衬底上的金属结构去除含有聚合物抗蚀剂和金属氧化物的残留物的方法。 解决方案：该方法包括在氮气存在下加热具有金属结构的基材的加热步骤（a），在存在下稳定的稳定步骤（b） 的纯氮（N 2 ），通过使用含有水，氮和氧中的至少一种的等离子体进行钝化的钝化步骤（c），和使用氧气去除 含有抗蚀剂的残渣。 版权所有（C）2006，JPO＆NCIPI

公开(公告)号：DE102004022402A1

公开(公告)日：2005-12-15

申请号：DE102004022402

申请日：2004-05-06

Applicant: INFINEON TECHNOLOGIES AG

Inventor： BACHMANN JENS

IPC: H01L21/3213 ,  H01L21/768 ,  H01L21/8242

Abstract: The method involves applying a mask to a fourth layer, and etching the non-masked regions of the fourth layer in a first plasma (P1), mainly comprising halogen-containing gas. The third layer is etched in a second plasma (P2), mainly comprising halogen-containing and nitrogen-containing gases. The second layer is etched in a third plasm (P1), which is preferably the same as the first plasma.

公开(公告)号：DE10231533A1

公开(公告)日：2004-01-29

申请号：DE10231533

申请日：2002-07-11

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SPERLICH HANS-PETER ,  BRENCHER LOTHAR ,  BACHMANN JENS

IPC: H01L21/3213

公开(公告)号：DE10206918A1

公开(公告)日：2003-08-28

申请号：DE10206918

申请日：2002-02-19

Applicant: INFINEON TECHNOLOGIES AG

Inventor： BACHMANN JENS ,  GOLLER KLAUS

IPC: H01L27/08 ,  H01G4/30 ,  H01G4/40

Abstract: The capacitor element has a carrier substrate (300) with a dielectric layer (310) arranged on the surface (300a) of the carrier substrate or arranged in the carrier substrate and capacitor electrodes (314,316) arranged next to each other in the dielectric layer and relative to the surface of the substrate so that the capacitance of the capacitor element is formed between the electrodes. AN Independent claim is also included for a method of generating a condenser element.

公开(公告)号：DE102004022402B4

公开(公告)日：2007-03-15

申请号：DE102004022402

申请日：2004-05-06

Applicant: INFINEON TECHNOLOGIES AG

Inventor： BACHMANN JENS

IPC: H01L21/3213 ,  H01L21/768 ,  H01L21/8242

公开(公告)号：DE10326087A1

公开(公告)日：2005-01-05

申请号：DE10326087

申请日：2003-06-10

Applicant: INFINEON TECHNOLOGIES AG

Inventor： GOLLER KLAUS ,  GRUENEBERG DIRK ,  BACHMANN JENS ,  SCHWAB REINER

IPC: H01L21/3213 ,  H01L27/08 ,  H01L27/06 ,  H01L21/30

Abstract: Component comprises an active structure (814) arranged on a substrate (800) and having side walls (818), and an auxiliary structure (100) arranged next to the active structure on the substrate and having side edges (102). The side edges of the active structure lie opposite the side edges of the auxiliary structure by a distance. The auxiliary structure-active structure distance is dimensioned so that one shape of the active structure side edges or one shape of the substrate next to the active structure side edges are different from the shape of the component in which the auxiliary structure is not present. An independent claim is also included for a process for the production of a component.

公开(公告)号：DE10062639A1

公开(公告)日：2002-07-04

申请号：DE10062639

申请日：2000-12-15

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HOEHNSDORF FALKO ,  KIESLICH ALBRECHT ,  BACHMANN JENS

IPC: H01L21/3213

Abstract: Production of conducting pathways, especially aluminum pathways comprises applying an aluminum conducting layer (13) onto a substrate (11); applying a titanium nitride layer; applying a lacquer mask; structuring the titanium nitride layer to a hard mask (19) using the lacquer mask; and structuring the conducting layer to form the conducting pathways using the hard mask. Preferred Features: The titanium nitride layer is 60-200 nm thick. The aluminum conducting layer contains copper and/or silicon as additives. A titanium layer (12) is applied to the conducting layer before the titanium nitride layer is applied. The conducting pathways have an aspect ratio of more than 2 and have a height of more than 350 nm and a width of less than 180 nm.

公开(公告)号：DE10326087B4

公开(公告)日：2008-03-20

申请号：DE10326087

申请日：2003-06-10

Applicant: INFINEON TECHNOLOGIES AG

Inventor： GOLLER KLAUS ,  GRUENEBERG DIRK ,  BACHMANN JENS ,  SCHWAB REINER

IPC: H01L27/06 ,  H01L21/30 ,  H01L21/3213 ,  H01L21/70 ,  H01L27/08

Abstract: Component comprises an active structure (814) arranged on a substrate (800) and having side walls (818), and an auxiliary structure (100) arranged next to the active structure on the substrate and having side edges (102). The side edges of the active structure lie opposite the side edges of the auxiliary structure by a distance. The auxiliary structure-active structure distance is dimensioned so that one shape of the active structure side edges or one shape of the substrate next to the active structure side edges are different from the shape of the component in which the auxiliary structure is not present. An independent claim is also included for a process for the production of a component.

公开(公告)号：DE10260352A1

公开(公告)日：2004-07-15

申请号：DE10260352

申请日：2002-12-20

Applicant: INFINEON TECHNOLOGIES AG

Inventor： GOLLER KLAUS ,  FOESTE BERND ,  KRIZ JAKOB ,  BACHMANN JENS

IPC: H01L27/08 ,  H01L21/822 ,  H01L21/768

Abstract: To make the capacitor arrangement (110) a stack (124b) of the following layers is produced: a base electrode layer (14), a base dielectric layer (16), at least one central electrode layer (18), a dielectric layer covering (20) and an electrode layer covering (22). This layer (22) and the central electrode layer (18) are structured in the first lithographic process. The electrode layer covering (22a) and the base electrode layer (14) are structured using a second lithographic process. An independent claim is included for the corresponding integrated capacitor arrangement.

公开(公告)号：DE10149736C1

公开(公告)日：2003-04-17

申请号：DE10149736

申请日：2001-10-09

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HOEHNSDORF FALKO ,  BACHMANN JENS ,  BAIER ULLRICH

IPC: H01L21/3213 ,  H01L21/768

Abstract: Etching of metal layer systems comprises providing a semiconductor wafer with at least two aluminum-containing layers consisting of an upper aluminum-containing layer (3) separated from a lower aluminum-containing layer (2) by an intermediate layer (5), and etching of the upper aluminum- containing layer with a first etching angle followed by etching of the lower aluminum- containing layer with a second etching angle different to the first etching angle. A switch is made between the first and the second etching steps as soon as an end point determination identifies that the intermediate layer has been reached. Preferred Features: The first etching step is carried out at a higher etching rate than the second etching step. The etching gas is a mixture of BCl3 and Cl2. During the second etching step the mixture contains a greater quantity of BCl3 and a smaller quantity of Cl2 than the mixture used for the first etching step. The etching gas also contains CH4 and N2. The intermediate layer is a titanium or TiN layer.