公开(公告)号：JP2006203214A

公开(公告)日：2006-08-03

申请号：JP2006012507

申请日：2006-01-20

Applicant: Infineon Technologies Ag ,  インフィネオン テクノロジーズ アクチエンゲゼルシャフト

Inventor： GOLLER KLAUS ,  ECKERT STEFAN ,  OESINGHAUS ANJA

IPC: H01L23/52 ,  H01L21/3205 ,  H01L21/60 ,  H01L21/768 ,  H01L21/8242 ,  H01L23/522 ,  H01L27/108

CPC classification number: H01L24/05 ,  H01L24/03 ,  H01L2224/02166 ,  H01L2224/05624 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/05042 ,  H01L2924/14 ,  H01L2924/19041

Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor device that is mechanically robust and ensures a long lifetime, without negative impact on functional product reliability.
SOLUTION: The semiconductor device 300 includes a semiconductor component integrated in a semiconductor substrate and a conductive pad 110, arranged on top of the semiconductor device 300. This conductive pad 110 is electrically connected to the semiconductor component. The pad 110 is arranged for connecting the semiconductor device 300 externally. A dielectric material 310 is positioned between the conductive pad 110 and an embedded conductive layer 20 of the semiconductor device 300. The dielectric material 310 comprises a stress-blocking structure.
COPYRIGHT: (C)2006,JPO&NCIPI

Abstract translation: 要解决的问题：提供机械坚固并确保长寿命的半导体器件，而不会对功能产品可靠性产生不利影响。 解决方案：半导体器件300包括集成在半导体衬底中的半导体部件和布置在半导体器件300的顶部上的导电焊盘110.该导电焊盘110电连接到半导体部件。 衬垫110被布置用于从外部连接半导体器件300。 介电材料310位于导电焊盘110和半导体器件300的嵌入式导电层20之间。介电材料310包括应力阻挡结构。 版权所有（C）2006，JPO＆NCIPI

公开(公告)号：WO2005031867A3

公开(公告)日：2005-07-28

申请号：PCT/EP2004052093

申请日：2004-09-08

Applicant: INFINEON TECHNOLOGIES AG ,  GOLLER KLAUS ,  WENZEL ROLAND

Inventor： GOLLER KLAUS ,  WENZEL ROLAND

IPC: H01L23/522

CPC classification number: H01L23/5226 ,  H01L2924/0002 ,  H01L2924/00

Abstract: The invention relates to a conductor track connection structure comprising a first conductor track (M1), a second conductor track (M2), and a plurality of connection elements (V) that electrically connect the first conductor track (M1) to the second conductor track (M2). According to the invention, the plurality of connection elements (V) is laterally embodied in at least one lateral region (S) of the first and second conductor tracks, in relation to an overlay alignment (I) of the conductor tracks, while a central region (Z) is free of connection elements (V). In this way, the electromigration properties of the connection structure are significantly improved and the current carrying capacity is increased.

Abstract translation: 本发明涉及一种具有一个第一互连（M1）的互连连接结构，第二导电线（M2）和多个连接构件（V）的，所述第一互连（M1）到第二互连（M2），其电互连。 多个根据本发明的相对于所述互连的横向在第一和第二互连的至少一个侧部（S）的覆盖对准（I）的连接构件（V）的形成，而中心区域（Z）是免费的连接元件（V）的。 以这种方式，互连结构可以显著提高载流能力的电迁移性能增加。

公开(公告)号：WO2004017143A3

公开(公告)日：2004-07-15

申请号：PCT/DE0302351

申请日：2003-07-11

Applicant: INFINEON TECHNOLOGIES AG ,  GOLLER KLAUS ,  HABERKERN ROLAND

Inventor： GOLLER KLAUS ,  HABERKERN ROLAND

IPC: G03F7/095 ,  G03F7/20 ,  H01L21/311 ,  H01L21/768 ,  G03F7/09

CPC classification number: H01L21/31144 ,  G03F7/095 ,  G03F7/203 ,  H01L21/76811 ,  H01L21/76813

Abstract: The invention relates to a method according to which a photosensitive resist layer arrangement (10) is produced after the production of a layer (12) to be structured, and is vertically selectively structured. Said resist layer arrangement contains, for example, a lower layer of lacquer (14) and an upper layer of lacquer (18). The inventive method enables less steps to be carried out during the production of an integrated circuit arrangement.

Abstract translation: 本发明涉及一种方法，其中在制造结构化层（12）之后，制造辐射敏感抗蚀剂层布置（10）并选择性地垂直构造。 抗蚀剂层结构包含例如下漆层（14）和上漆层（18）。 该方法可以节省制造集成电路装置中的工艺步骤。

公开(公告)号：WO2004021414A2

公开(公告)日：2004-03-11

申请号：PCT/DE0302677

申请日：2003-08-08

Applicant: INFINEON TECHNOLOGIES AG ,  GOLLER KLAUS

Inventor： GOLLER KLAUS

IPC: H01L21/02 ,  H01L21/285 ,  H01L21/311 ,  H01L21/768

CPC classification number: H01L28/75 ,  H01L21/28568 ,  H01L21/31116 ,  H01L21/76802

Abstract: An integrated circuit arrangement (12) is disclosed, amongst other things, in which the thickness (D2a) of an etching stop layer (18a) is matched to the etching process such that contact holes (26, 28) of varying depths can be precisely etched as far as a top electrode (16a) and a base electrode (10a).

Abstract translation: 进行了说明，除其他外，集成电路装置（12），其中，所述厚度（D2A）的蚀刻停止层（18A）被设置成适合于在蚀刻过程，接触孔（26,28）的不同深度的精确到顶部电极（16A）和底电极 （10a）可以被蚀刻。

公开(公告)号：DE102016104507A1

公开(公告)日：2017-09-14

申请号：DE102016104507

申请日：2016-03-11

Applicant: INFINEON TECHNOLOGIES AG

Inventor： FÖRSTER JÜRGEN ,  RECCIUS CHRISTIAN ,  GOLLER KLAUS

IPC: H01L27/08 ,  C23C14/06 ,  C23C14/34 ,  H01L21/203 ,  H01L21/283 ,  H01L21/3205 ,  H01L29/43 ,  H01L29/86

Abstract: Ein Halbleiterbauelement, das eine Tantalnitridwiderstandsstruktur umfasst, die eine Tantalnitridschicht mit einem Flächenwiderstand von mehr als 100 Ω/Quadrat aufweist.

公开(公告)号：DE10206918A1

公开(公告)日：2003-08-28

申请号：DE10206918

申请日：2002-02-19

Applicant: INFINEON TECHNOLOGIES AG

Inventor： BACHMANN JENS ,  GOLLER KLAUS

IPC: H01L27/08 ,  H01G4/30 ,  H01G4/40

Abstract: The capacitor element has a carrier substrate (300) with a dielectric layer (310) arranged on the surface (300a) of the carrier substrate or arranged in the carrier substrate and capacitor electrodes (314,316) arranged next to each other in the dielectric layer and relative to the surface of the substrate so that the capacitance of the capacitor element is formed between the electrodes. AN Independent claim is also included for a method of generating a condenser element.

公开(公告)号：DE50304559D1

公开(公告)日：2006-09-21

申请号：DE50304559

申请日：2003-10-16

Applicant: INFINEON TECHNOLOGIES AG

Inventor： GOLLER KLAUS ,  WENZEL ROLAND DR

IPC: H01L23/544 ,  H01L23/522 ,  H01L23/528

Abstract: Additional planar structures are arranged closely adjacent to each other around a via (4) or contact hole and the corresponding conductive track (2), within the uppermost and/or the underlying conductive track (2) of the metallization plane. The structures are dummy structures with or without circuit functions, e.g. dummy tracks.

公开(公告)号：DE10326087A1

公开(公告)日：2005-01-05

申请号：DE10326087

申请日：2003-06-10

Applicant: INFINEON TECHNOLOGIES AG

Inventor： GOLLER KLAUS ,  GRUENEBERG DIRK ,  BACHMANN JENS ,  SCHWAB REINER

IPC: H01L21/3213 ,  H01L27/08 ,  H01L27/06 ,  H01L21/30

Abstract: Component comprises an active structure (814) arranged on a substrate (800) and having side walls (818), and an auxiliary structure (100) arranged next to the active structure on the substrate and having side edges (102). The side edges of the active structure lie opposite the side edges of the auxiliary structure by a distance. The auxiliary structure-active structure distance is dimensioned so that one shape of the active structure side edges or one shape of the substrate next to the active structure side edges are different from the shape of the component in which the auxiliary structure is not present. An independent claim is also included for a process for the production of a component.

公开(公告)号：DE10233209A1

公开(公告)日：2004-02-05

申请号：DE10233209

申请日：2002-07-22

Applicant: INFINEON TECHNOLOGIES AG

Inventor： GOLLER KLAUS ,  HABERKERN ROLAND

IPC: G03F7/095 ,  G03F7/20 ,  H01L21/311 ,  H01L21/768

Abstract: Irradiating a resist during the production of an integrated switching arrangement comprises forming a radiation-sensitive resist layer arrangement (10) after producing a layer (12) to be structured, and irradiating the resist layer arrangement using a radiation source. During irradiation the structure of a region (40-44) close to the radiation source is changed in such a way that the region is selectively developed and the structure of a region (46-50) of the resist layer arrangement away from the radiation source covered by the region close to the radiation source is only slightly changed.

公开(公告)号：DE102010017109B4

公开(公告)日：2018-05-09

申请号：DE102010017109

申请日：2010-05-27

Applicant: INFINEON TECHNOLOGIES AG

Inventor： ALLERS KARL-HEINZ ,  BOECK JOSEF ,  GOLLER KLAUS ,  LACHNER RUDOLF ,  LIEBL WOLFGANG

IPC: H01L27/08 ,  H01L21/768 ,  H01L23/522

Abstract: Halbleiterchip (130, 140), der Folgendes enthält:eine Kondensatoranordnung (410), die zwischen eine erste Metallisierungsebene Mn und eine zweite Metallisierungsebene Mn+1 des Chips (130, 140) gekoppelt ist, wobei die zweite Metallisierungsebene Mn+1 der ersten Metallisierungsebene Mn benachbart ist, wobei n einen Index repräsentiert, der eine Metallisierungsebene anzeigt; und wobei die erste Metallisierungsebene Mn wenigstens eine erste Leitung (Mn(1)) und die zweite Metallisierungsebene Mn+1 wenigstens eine zweite Leitung (Mn+1(1)) aufweist, und wobei die Kondensatoranordnung (410) Folgendes aufweist:einen ersten Kondensator (CAP1) mit einer ersten Elektrodenoberfläche (S1A) und einer zweiten Elektrodenoberfläche (S1B) undeinen zweiten Kondensator (CAP2), der über dem ersten Kondensator (CAP1) gestapelt und elektrisch mit diesem in Reihe gekoppelt ist, wobei der zweite Kondensator (CAP2) eine dritte Elektrodenoberfläche (S2A) und eine vierte Elektrodenoberfläche (S2B) enthält, wobei die zweite Elektrodenoberfläche (S1B) und dritte Elektrodenoberfläche (S2A) elektrisch potentialfrei sind,wobei die vierte Elektrodenoberfläche (S2B) durch mindestens ein leitendes Via (Vn(1)) elektrisch an die zweite Metallisierungsebene Mn+1 gekoppelt ist undwobei die vierte Elektrodenoberfläche (S2B) eine Oberfläche des leitenden Vias (Vn(1)) ist.