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    VALVE MEANS FOR SLURRY OUTPUT OPENING IN CHEMICAL MECHANICAL POLISHING DEVICE
    1.
    发明专利
    VALVE MEANS FOR SLURRY OUTPUT OPENING IN CHEMICAL MECHANICAL POLISHING DEVICE 审中-公开

    公开(公告)号：JP2003115467A

    公开(公告)日：2003-04-18

    申请号：JP2002211612

    申请日：2002-07-19

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： GEYER STEFAN ,  FISCHER ANDREAS

    IPC: B24B37/04 ,  B24B57/02 ,  H01L21/304 ,  B24B37/00

    Abstract: PROBLEM TO BE SOLVED: To provide means for preventing such a phenomenon as particles aggregate in the opening region of the slurry output in a CMP system arrangement. SOLUTION: The valve means having a slurry outlet opening in a chemical mechanical polishing system, more specifically a chemical mechanical polishing system of a semiconductor wafer in the production of DRAM, characterizes a resilient barrier wall (2) covering the slurry outlet opening (1) and having at least one automatic closing opening (3) wherein the opening can be shifted to a position for passing slurry and when slurry does not flow, the opening is shifted automatically to a position for blocking slurry.

    Vorrichtung mit Zentrifuge zum Herstellen verlängerter Lothügel und zugehöriges Verfahren
    5.
    发明专利
    Vorrichtung mit Zentrifuge zum Herstellen verlängerter Lothügel und zugehöriges Verfahren 未知

    公开(公告)号：DE102008008513B4

    公开(公告)日：2013-10-10

    申请号：DE102008008513

    申请日：2008-02-11

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： GEYER STEFAN

    IPC: H01L21/60 ,  H01L23/50

    Abstract: Vorrichtung, umfassend: eine Zentrifuge (42) mit einem Fenster (50), eine innerhalb der Zentrifuge (42) angeordnete Zentrifugentrommel (46) mit einem Waferhalter (48a–48i) zur Halterungeines Wafers (20a–20i) mit Lothügeln (32a–32i), und eine Wärmequelle (44) zur Übertragung von Wärme durch das Fenster (50) hindurch auf die Lothügel (32a–32i) zum Aufschmelzen der Lothügel (32a–32i) während Zentrifugalkräfte auf die Lothügel (32a–32i) und den Wafer (20a–20i) wirken, so dass verlängerte Lothügel (60a–60i) erzeugt werden können.

    Raster electron microscope process to monitor the presence of corrosive substances present in the vicinity of semiconductor manufacture
    6.
    发明专利
    Raster electron microscope process to monitor the presence of corrosive substances present in the vicinity of semiconductor manufacture 未知

    公开(公告)号：DE10338024B3

    公开(公告)日：2005-01-27

    申请号：DE10338024

    申请日：2003-08-19

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： GEYER STEFAN

    IPC: H01L21/66 ,  H01L23/544 ,  G01N13/12

    Abstract: In semiconductor manufacturing process, air is monitored for presence of corrosive substances, starting with the presentation of a wafer with a surface structure and capture of the first commensurate image. The wafer is repeatedly heated and cooled a given number of times to temperatures above and below the dew point, and the second surface structure image captured and compared with the first. The image of the exposed wafer is compared with the original at regular intervals using a raster electron microscope or other suitable detection and measuring instrument. The wafer is exposed to ambient air at between less than 5C and more than 25C and a relative humidity of 35 to 45%. The images are captured at eight-hour intervals.

    7.
    发明专利
    未知

    公开(公告)号：DE10137577C1

    公开(公告)日：2003-03-06

    申请号：DE10137577

    申请日：2001-07-31

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： GEYER STEFAN ,  FISCHER ANDREAS

    IPC: B24B37/04 ,  B24B57/02 ,  H01L21/304 ,  F16K7/12 ,  H01L21/306

    Abstract: A valve for a slurry outlet opening in an installation for chemical mechanical polishing, in particular of semiconductor wafers in DRAM production, includes an elastic diaphragm, which covers the slurry outlet opening and has at least one self-closing opening. It is possible for the opening to be moved into a feedthrough position for the slurry by flowing slurry and to be automatically moved into a blocking position for the slurry when the slurry is not flowing. A CMP installation having such a valve is also provided. This creates a simple way of preventing particle agglomerations in the region of the fluid outlet opening of a CMP installation.

    Lithographic projection photo-mask, useful e.g. in structuring semiconductor wafers to form integrated circuits, includes absorber in purging gas volume above substrate to inhibit crystal formation
    9.
    发明专利
    Lithographic projection photo-mask, useful e.g. in structuring semiconductor wafers to form integrated circuits, includes absorber in purging gas volume above substrate to inhibit crystal formation 未知

    公开(公告)号：DE102005052046A1

    公开(公告)日：2007-05-03

    申请号：DE102005052046

    申请日：2005-10-31

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： NEES DIETER ,  BAUCH LOTHAR ,  GEYER STEFAN ,  BRUCH JENS UWE ,  KLINGBEIL PATRICK ,  SCHUMACHER KARL ,  STAECKER JENS ,  SCHIWON ROBERTO ,  HOMMEN HEIKO ,  BONNESS ANJA

    IPC: G03F1/64

    Abstract: A lithographic projection photo-mask (5) comprises: (a) a transparent substrate (10) with a pattern (14) of structural elements (16); (b) a frame (18), on the substrate outside the pattern; (c) a protective film (20) above the substrate, forming an enclosed volume filled with purging gas; and (d) an arrangement (32) of absorber within the enclosed volume, to remove harmful materials from the gas and inhibit crystal formation on the mask. A photo-mask (5) for lithographic projection comprises: (a) a transparent substrate (10), provided on its front with a pattern (14) of absorbing, partially absorbing or phase-shifting structural elements (16); (b) a frame (18), located on the front side of the substrate outside the pattern; (c) a protective film (20), located above the substrate on the frame, forming an enclosed volume filled with purging gas; and (d) an absorber arrangement (32), including absorber located in the frame region within the enclosed volume, for removing harmful materials from the purging gas to inhibit crystal formation on the mask. An independent claim is included for a method for using the mask in an exposure plant, involving: (A) supplying the mask into an exposure device from a protective container; (B) carrying out one or more exposure processes in the exposure device using light from an ultraviolet source; and (C) withdrawing the mask from the exposure device into the protective container.

    Wafer level package for chip, i.e. dynamic random access memory, comprises chip bonded to fiber reinforced synthetic resin sheet and polymer coating on edges of chip and resin sheet
    10.
    发明专利
    Wafer level package for chip, i.e. dynamic random access memory, comprises chip bonded to fiber reinforced synthetic resin sheet and polymer coating on edges of chip and resin sheet 未知

    公开(公告)号：DE102004050027A1

    公开(公告)日：2005-06-02

    申请号：DE102004050027

    申请日：2004-10-13

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： GEYER STEFAN

    IPC: H01L21/60 ,  H01L23/00 ,  H01L23/31 ,  H01L23/485 ,  H01L21/56 ,  H01L23/50

    Abstract: A wafer level package comprises a chip that has a thickness that is significantly less than a thickness at which the chip can be fabricated; a fiber reinforced synthetic resin sheet, where the chip is bonded, forming a solidly bonded assembly that cannot come apart in the customary temperature range; and a polymer coating overlying edges of the chip and at least a portion of edges of the fiber reinforced synthetic resin sheet. A wafer level package comprises a chip (1) that has a thickness that is significantly less than a thickness at which the chip can be fabricated; a fiber reinforced synthetic resin sheet (4), where the chip is bonded onto the fiber reinforced synthetic resin sheet, forming a solidly bonded assembly (5) that cannot come apart in the customary temperature range; and a polymer coating overlying edges of the chip and at least a portion of edges (6) of the fiber reinforced synthetic resin sheet. An independent claim is included for a method for producing a wafer level package, comprising providing a semiconductor wafer; thinning the wafer to an intended thickness; adhesively bonding a wafer-sized fiber reinforced synthetic resin sheet onto the back side of the wafer to form a wafer assembly that includes the wafer and the fiber reinforced synthetic resin sheet; sawing into the wafer assembly from the chip side to a predetermined depth to form kerfs; applying a polymer to the chip side of the wafer assembly so that inner surfaces of the kerfs are coated with the polymer; and sawing the wafer assembly into individual chips.

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