中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

11 records (took 0.023 seconds)

    DEMODULATION CIRCUIT AND DEMODULATION METHOD
    1.
    发明申请
    DEMODULATION CIRCUIT AND DEMODULATION METHOD 审中-公开
    解调的调制解调

    公开(公告)号：WO0197372A3

    公开(公告)日：2002-12-27

    申请号：PCT/DE0102100

    申请日：2001-06-05

    Applicant: INFINEON TECHNOLOGIES AG ,  KARGL WALTER ,  KUPNIK MARIO ,  NEUHOLD ERNST

    Inventor： KARGL WALTER ,  KUPNIK MARIO ,  NEUHOLD ERNST

    IPC: H03D1/10

    CPC classification number: H03D1/10

    Abstract: In order to demodulate an amplitude-modulated signal, two capacitors (C1, C2) are provided to which a signal rectified by a diode (D1) and having a voltage (U1) can be fed. The half-waves of this signal are used by a switch (S3) for alternately charging the first or second capacitor. The capacitors (C1, C2) are discharged by the switches (S1, S2). A comparison of the amplitude values, stored in the capacitors (C1, C2), of the successive half-waves which is carried out in an evaluation unit (AE) enables the execution of a simple and precise demodulation, which can be implemented using few components and at very high frequencies.

    Abstract translation: 用于解调振幅调制的信号，两个电容（C1，C2）中提供，其中一个与二极管（D1）与可提供的电压（U1）整流信号。 该信号的半波可以用一个开关（S3）交替地进行充电的第一或第二电容器一起使用。 与开关（S1，S2）被放电，电容器（C1，C2）。 存储在评估单元（AE）的连续半波的振幅值的电容器（C1，C2）的比较允许简单，可实现使用很少的元件和精确解调，这是可能的，在非常高的频率。

    3.
    发明专利
    未知

    公开(公告)号：DE59902239D1

    公开(公告)日：2002-09-05

    申请号：DE59902239

    申请日：1999-12-07

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： NEUHOLD ERNST ,  HOENIGSCHMID HEINZ ,  BRAUN GEORG ,  MANYOKI ZOLTAN ,  BOEHM THOMAS ,  ROEHR THOMAS

    IPC: G11C11/22 ,  G06F11/20 ,  G11C29/00 ,  G11C29/04

    Abstract: An integrated memory contains two normal read amplifiers and two first redundant read amplifiers. It also contains bit lines which are combined into at least two individually addressable normal columns, at least one of which from each normal column is connected to one of the normal read amplifiers. It also has first redundant bit lines which are combined into one individually addressable redundant column, at least one of which is connected to one of the redundant read amplifiers. The first redundant read amplifier and its redundant columns are provided for replacing the two normal read amplifiers and one of the normal columns.

Patent Agency Ranking