公开(公告)号：WO02054470A3

公开(公告)日：2003-01-16

申请号：PCT/DE0104590

申请日：2001-12-06

Applicant: INFINEON TECHNOLOGIES AG ,  RUF ALEXANDER ,  URBANSKY NORBERT ,  CLAUSSEN WILHELM ,  GAERTNER THOMAS ,  SCHMIDBAUER SVEN

Inventor： RUF ALEXANDER ,  URBANSKY NORBERT ,  CLAUSSEN WILHELM ,  GAERTNER THOMAS ,  SCHMIDBAUER SVEN

IPC: H01L21/285 ,  H01L21/768 ,  H01L21/28

CPC classification number: H01L21/76843 ,  H01L21/28518 ,  H01L21/76856

Abstract: The invention relates to a method for contacting a doping area (3) which is formed on the surface (2) of a substrate (1). According to the invention, an isolating layer (5) is applied to the surface of the substrate (2) and a contact hole (16) is formed in the isolating layer (5). Subsequently, a layer containing metal (6) is placed on the isolating layer (5) and the surface area (4) of the doping area (3) which is bared by means of a contact hole (16). A two-stepped temperature process then follows, whereby in the first step the layer containing metal (6) is reacted with the silicon of the doping area (3) in order to obtain a metal silicon layer (7), and subsequently in the second temperature step the remaining layer containing metal (6) is transformed into a layer (8) containing metal nitrides.

Abstract translation: 一个Doteirgebiet设置在基板（1）的基板（2）表面上（3）接触的过程中形成。 有被施加在基底表面（2）上的绝缘层（5）和形成在绝缘层中的接触孔（16）（5）。 随后，在绝缘层（5）和由所述接触孔露出（16）的表面积上的含金属层（6）（4）掺杂区的（3）沉积。 在随后的，两步热过程中的含有金属的层（6）与所述掺杂区（3）的一种金属硅化物层的硅（7）是第一verreagiert，然后在第二温度的步骤中，含有金属的层（6）的在含金属的氮化物的层的其余部分 （8）转换。

公开(公告)号：DE10347731A1

公开(公告)日：2005-05-25

申请号：DE10347731

申请日：2003-10-14

Applicant: INFINEON TECHNOLOGIES AG

Inventor： RUF ALEXANDER ,  WEGE STEPHAN

IPC: H01L21/033 ,  H01L21/308 ,  H01L21/311 ,  H01L21/3213

Abstract: The method involves providing a semiconductor substrate (S) with a layer for etching (L), a first mask layer (HM) above the layer to be etched, a second mask layer (R) above the first mask layer, forming a first opening (RO) with a first characteristic width dimension in the second mask layer and transferring it to the first mask layer by etching, forming a second opening (RM) with a larger second characteristic width dimension from the first opening in the first mask layer by etching, removing the second mask layer and transferring the second opening into the layer to be etched by etching.

公开(公告)号：DE50112534D1

公开(公告)日：2007-07-05

申请号：DE50112534

申请日：2001-12-06

Applicant: INFINEON TECHNOLOGIES AG

Inventor： RUF ALEXANDER ,  URBANSKY NORBERT ,  CLAUSSEN WILHELM ,  GAERTNER THOMAS ,  SCHMIDBAUER SVEN

IPC: H01L21/28 ,  H01L21/285 ,  H01L21/768

Abstract: A method makes contact with a doping region formed at a substrate surface of a substrate. An insulating layer is applied on the substrate surface and a contact hole is formed in the insulating layer. A metal-containing layer is subsequently deposited on the insulating layer and the surface region of the doping region that is uncovered by the contact hole. In a subsequent thermal process having two steps, first the metal-containing layer is reacted with the silicon of the doping region to form a metal silicide layer and then the rest of the metal-containing layer is converted into a metal-nitride-containing layer in a second thermal step.

公开(公告)号：DE10347731B4

公开(公告)日：2005-12-29

申请号：DE10347731

申请日：2003-10-14

Applicant: INFINEON TECHNOLOGIES AG

Inventor： RUF ALEXANDER ,  WEGE STEPHAN

IPC: H01L21/033 ,  H01L21/308 ,  H01L21/311 ,  H01L21/3213

公开(公告)号：DE10149688A1

公开(公告)日：2003-04-24

申请号：DE10149688

申请日：2001-10-09

Applicant: INFINEON TECHNOLOGIES AG

Inventor： RUF ALEXANDER

IPC: H01L23/48 ,  H01L23/485 ,  H01L23/49 ,  B81C1/00 ,  B81B3/00 ,  H01L23/50 ,  H01L21/66 ,  H01R43/16 ,  G01R31/28

Abstract: The invention relates to a method for fabricating a microcontact spring on a substrate (1) with at least one contact pad (2) and a first insulator layer (13) with a window above the contact pad (2).In order to enable the cost-effective contact-connection or wiring of a plurality of silicon chips at the wafer level simultaneously, the method according to the invention comprises the steps of: a) producing a via opening (19) in a second insulator layer (16) above a location to be contact-connected; b) producing a depression (20) in the second insulator layer (16); c) filling the via opening (19) and the depression (20) in the second insulator layer (16) with a metal; d) leveling the surface produced by the preceding steps, so that excess metal and insulator material are removed; e) selectively etching back a first predetermined thickness of the second insulator layer (16), so that the second insulator layer (16) remains with a second predetermined thickness, so that a section of the via opening (19) is maintained and serves as mechanical retention for the resulting microcontact spring.

公开(公告)号：DE19958202A1

公开(公告)日：2001-07-12

申请号：DE19958202

申请日：1999-12-02

Applicant: INFINEON TECHNOLOGIES AG

Inventor： RUF ALEXANDER ,  NICHTERWITZ MARION

IPC: C25D7/12 ,  C25D21/12 ,  C25D5/00 ,  C25D5/34 ,  C25D5/48

Abstract: A method for producing a metal layer with a given thickness includes the step of measuring an electrical resistance of the metal layer via connections on a starting layer provided under the metal layer. The resistance measurement is performed during or after the deposition of the metal layer. The layer thickness of the deposited metal layer is determined from the resistance measurement. Depending on the thickness of the already deposited metal layer, the deposition process is continued or repeated until a metal layer with a desired thickness is produced.

公开(公告)号：DE10208714B4

公开(公告)日：2006-08-31

申请号：DE10208714

申请日：2002-02-28

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SCHNEEGANS MANFRED ,  RUF ALEXANDER

IPC: H01L21/283 ,  G11C5/06 ,  H01L21/4763 ,  H01L21/768 ,  H01L23/485 ,  H01L23/522 ,  H01L31/0336

Abstract: Contact for an integrated circuit comprises entirely of titanium and/or titanium nitride. The contact runs through a contact hole in an insulation layer (5) between a first line plane and a second line plane to connect the first line plane to the second line plane. An Independent claim is included for a method for fabricating a contact, comprising depositing a titanium layer on the walls of the contact hole and on the surrounding surface of the insulation layer; depositing a titanium nitride layer in order to fill the contact hole and on the surrounding surface of the insulation layer; and polishing back titanium layer and the titanium nitride layer on the surrounding surface of the insulation layer in a single-stage polishing step.

公开(公告)号：DE10149688B4

公开(公告)日：2004-09-09

申请号：DE10149688

申请日：2001-10-09

Applicant: INFINEON TECHNOLOGIES AG

Inventor： RUF ALEXANDER

IPC: H01L23/48 ,  H01L23/485 ,  H01L23/49 ,  B81C1/00 ,  H01L23/50 ,  H01L21/66 ,  H01R43/16 ,  G01R31/28

Abstract: The invention relates to a method for fabricating a microcontact spring on a substrate (1) with at least one contact pad (2) and a first insulator layer (13) with a window above the contact pad (2).In order to enable the cost-effective contact-connection or wiring of a plurality of silicon chips at the wafer level simultaneously, the method according to the invention comprises the steps of: a) producing a via opening (19) in a second insulator layer (16) above a location to be contact-connected; b) producing a depression (20) in the second insulator layer (16); c) filling the via opening (19) and the depression (20) in the second insulator layer (16) with a metal; d) leveling the surface produced by the preceding steps, so that excess metal and insulator material are removed; e) selectively etching back a first predetermined thickness of the second insulator layer (16), so that the second insulator layer (16) remains with a second predetermined thickness, so that a section of the via opening (19) is maintained and serves as mechanical retention for the resulting microcontact spring.

公开(公告)号：DE10153619B4

公开(公告)日：2004-07-29

申请号：DE10153619

申请日：2001-10-31

Applicant: INFINEON TECHNOLOGIES AG

Inventor： GRUENING VON SCHWERIN ULRIKE ,  RUF ALEXANDER ,  RICHTER FRANK ,  BEWERSDORFF-SARLETTE ULRIKE

IPC: H01L21/336 ,  H01L21/265 ,  H01L21/28 ,  H01L29/423

Abstract: The production of a gate layer stack for an integrated circuit configuration comprises depositing a lower gate layer on the gate oxide layer formed on a semiconductor substrate; depositing and patterning an upper gate layer; patterning an upper part of a layer thickness of the lower gate layer; depositing a protective layer; and further patterning until lower part of layer thickness is patterned. The production of a gate layer stack (10) for an integrated circuit configuration comprises depositing a lower gate layer on the gate oxide layer (2) formed on a semiconductor substrate (1); depositing an upper gate layer having a higher electrical conductivity than the lower gate layer above the lower gate layer; patterning at least the upper gate layer; patterning an upper part of a layer thickness of the lower gate layer; depositing a protective layer at least onto sidewalls (8) of the patterned upper gate layer and of the upper part of the layer thickness of the lower gate layer resulting in a formation of sidewall coverings (9), the lower gate layer, upper gate layer, and the protective layer defining the gate layer stack; and further patterning the gate layer stack at least until the gate oxide layer is reached and the lower gate layer is patterned only in a lower part of the layer thickness.

公开(公告)号：DE59811244D1

公开(公告)日：2004-05-27

申请号：DE59811244

申请日：1998-07-02

Applicant: INFINEON TECHNOLOGIES AG

Inventor： RUF ALEXANDER

IPC: B82B1/00 ,  G03F1/00 ,  G03F1/14 ,  G03F7/20 ,  H01L21/027

Abstract: An apparatus for transferring structures to a layer to be patterned. The apparatus has a base element and at least one radiation-conducting structure projecting from the base element. The radiation-conducting structure guides radiation to an exit aperture facing away from the base element and the shape of which structure is matched to that of the structure to be transferred.