中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

5 records (took 0.02 seconds)

    ETCHING COMPOSITION AND USE THEREOF FOR CLEANING METALLIZATION LAYERS
    1.
    发明申请
    ETCHING COMPOSITION AND USE THEREOF FOR CLEANING METALLIZATION LAYERS 审中-公开
    蚀刻组合物及其用于清洁金属化层

    公开(公告)号：WO0207205A3

    公开(公告)日：2002-07-18

    申请号：PCT/US0122334

    申请日：2001-07-16

    Applicant: INFINEON TECHNOLOGIES CORP

    Inventor： TEWS HELMUT

    IPC: C09K13/08 ,  H01L21/02 ,  H01L21/3213 ,  H01L21/306 ,  H01L21/66

    CPC classification number: H01L21/02071 ,  C09K13/08

    Abstract: A process for providing an aqueous back-end-of-line (BEOL) clean with feed-back control to monitor the active component of HF in the clean, for a wiring/interconnect of a reactive ion etched semiconductor device, comprising: subjecting the reactive ion etched semiconductor device to a post metal RIE clean using an etchant composition comprising about 0.01 to about 15 percent by weight of sulfuric acid; about 0.1 to about 100 ppm of a fluoride containing compound; and a member selected from the group consisting of about 0.01 to about 20 percent by weight of hydrogen peroxide or about 1 to about 30 ppm of ozone, comprising: a) mixing water, sulfuric acid and hydrogen peroxide in a mixing tank; b) mixing HF directly into the mixing tank or adding HF into a separate vessel for wafer processing, either before, during or after the mixture water, sulfuric acid and hydrogen peroxide as a mixture is transported to the separate tank for wafer processing; c) taking a sample comprising HF from the mixing tank or HF from the wafer processing tank and sending the sample through a feedback loop; d) comparing the sample to a standard dilute solution of HF to obtain a value of HF concentration in the sample; e) inputting the value to a tank tool recipe control to cause any needed adjustment in concentration of HF to a predetermined range, either in the mixing tank or the wafer processing vessel; and f) subjecting the wiring/interconnect of the semiconductor device to etching by the etchant composition to remove sidewall polymer, polymer rails and via residue without etching conductive materials during removal of sidewall polymer, polymer rails, and via residue.

    Abstract translation: 一种用于提供具有反馈控制的水性后端（BEOL）清洁的方法，用于监测清洁中的HF的有源分​​量，用于反应离子蚀刻半导体器件的布线/互连，包括： 使用包含约0.01至约15重量％的硫酸的蚀刻剂组合物将反应离子蚀刻的半导体器件转化为后金属RIE清洁; 约0.1至约100ppm的含氟化合物; 和选自约0.01至约20重量％的过氧化氢或约1至约30ppm的臭氧的成员，其包括：a）在混合罐中混合水，硫酸和过氧化氢; b）将HF直接混合到混合罐中或将HF加入到用于晶片加工的单独的容器中，在混合物之前，期间或之后，将混合物中的硫酸和过氧化氢输送到用于晶片处理的单独的罐中; c）从混合罐或HF从晶片处理槽中取出包含HF的样品，并通过反馈回路发送样品; d）将样品与HF的标准稀释溶液进行比较，以获得样品中HF浓度的值; e）将所述值输入到罐工具配方控制中，以使所述HF的浓度在所述混合罐或所述晶片处理容器中进行任何所需的HF浓度调整至预定范围; 以及f）在除去侧壁聚合物，聚合物轨道和通孔残留物之前，通过蚀刻剂组合物对半导体器件的布线/互连线进行蚀刻以去除侧壁聚合物，聚合物轨道和通孔残留物而不蚀刻导电材料。

    PROCESS FLOW FOR CAPACITANCE ENHANCEMENT IN A DRAM TRENCH
    2.
    发明申请
    PROCESS FLOW FOR CAPACITANCE ENHANCEMENT IN A DRAM TRENCH 审中-公开
    DRAM TRENCH中电容增强的工艺流程

    公开(公告)号：WO0245131A3

    公开(公告)日：2003-05-15

    申请号：PCT/US0144626

    申请日：2001-11-28

    Applicant: INFINEON TECHNOLOGIES CORP ,  IBM

    Inventor： CHUDZIK MICHAEL ,  TEWS HELMUT ,  MCSTAY IRENE ,  KUDELKA STEPHAN ,  SETTLEMYER KENNETH ,  JAMMY RAJARAO ,  FALTERMEIER JOHNATHAN

    IPC: H01L21/02 ,  H01L21/8242

    CPC classification number: H01L27/1087 ,  H01L28/84 ,  Y10S438/964

    Abstract: Methods forming a trench region of a trench capacitor structure having increase surface area are provided. One method includes the steps of forming a discontinuous polysilicon layer (43) on exposed walls of a lower trench region, the discontinuous polysilicon layer having gaps (44) therein which expose portions of said substrate; oxidizing the lower trench region such that the exposed portions of said substrate provided by the gaps in the discontinuous polysilicon layer are oxidized into oxide material which forms a smooth and wavy layer with the discontinuous polysilicon layer; and etching said oxide material so as to form smooth hemispherical grooves (46) on the walls of the trench region.

    Abstract translation: 提供了形成具有增加的表面积的沟槽电容器结构的沟槽区域的方法。 一种方法包括以下步骤：在下沟槽区域的暴露壁上形成不连续的多晶硅层（43），所述不连续的多晶硅层在其中具有暴露所述衬底部分的间隙（44） 氧化下沟槽区域，使得由不连续多晶硅层中的间隙提供的所述衬底的暴露部分被氧化成与不连续多晶硅层形成平滑波浪层的氧化物材料; 并蚀刻所述氧化物材料，以在沟槽区域的壁上形成平滑的半球状凹槽（46）。

    NEGATIVE ION IMPLANT MASK FORMATION FOR SELF-ALIGNED, SUBLITHOGRAPHIC RESOLUTION PATTERNING FOR SINGLE-SIDED VERTICLE DEVICE FORMATION
    3.
    发明申请
    NEGATIVE ION IMPLANT MASK FORMATION FOR SELF-ALIGNED, SUBLITHOGRAPHIC RESOLUTION PATTERNING FOR SINGLE-SIDED VERTICLE DEVICE FORMATION 审中-公开
    用于自对准的负离子植入物掩模形成，用于单面垂直装置形成的分层解析图案

    公开(公告)号：WO0247157A3

    公开(公告)日：2003-01-30

    申请号：PCT/US0144920

    申请日：2001-11-29

    Applicant: INFINEON TECHNOLOGIES CORP ,  IBM

    Inventor： DIVAKARUNI RAMA ,  KUDELKA STEPHAN ,  LEE KIL-HO ,  MCSTAY IRENE ,  SCHROEDER UWE ,  TEWS HELMUT

    IPC: H01L21/8242 ,  H01L21/763 ,  H01L21/8234

    CPC classification number: H01L27/10867

    Abstract: A process for fabricating a single-sided semiconductor deep trench structure filled with polysilicon trench fill material includes the following steps. Form a thin film, silicon nitride, barrier layer over the trench fill material. Deposit a thin film of an amorphous silicon masking layer over the barrier layer. Perform an angled implant into portions of the amorphous silicon masking layer which are not in the shadow of the deep trench. Strip the undoped portions of the amorphous silicon masking layer from the deep trench. Then strip the newly exposed portions of barrier layer exposing a part of the trench fill polysilicon surface and leaving the doped, remainder of the amorphous silicon masking layer exposed. Counterdope the exposed part of the trench fill material. Oxidize exposed portions of the polysilicon trench fill material, and then strip the remainder of the masking layer.

    Abstract translation: 用于制造填充有多晶硅沟槽填充材料的单面半导体深沟槽结构的工艺包括以下步骤。 在沟槽填充材料上形成薄膜，氮化硅，阻挡层。 在阻挡层上沉积非晶硅掩模层的薄膜。 对非深度沟槽阴影的非晶硅掩模层的部分进行成角度的注入。 从深沟槽剥离非晶硅掩模层的未掺杂部分。 然后剥离暴露部分沟槽填充多晶硅表面的势垒层的新暴露部分，并且使非晶硅掩模层的掺杂剩余部分露出。 反映出暴露部分的沟槽填充材料。 氧化多晶硅沟槽填充材料的暴露部分，然后剥离掩模层的其余部分。

Patent Agency Ranking