公开(公告)号：JP2008077663A

公开(公告)日：2008-04-03

申请号：JP2007244076

申请日：2007-09-20

Applicant: Intel Corp ,  インテル・コーポレーション

Inventor： ZOHAR RONEN ,  SECONI MARK ,  PARTHASARATHY RAJESH ,  CHENNUPATY SRINIVAS ,  BUXTON MARK ,  DESYLVA CHUCK

IPC: G06F17/16 ,  G06F9/30

CPC classification number: G06F17/10 ,  G06F7/48 ,  G06F7/5443 ,  G06F9/3001

Abstract: PROBLEM TO BE SOLVED: To provide a method, an apparatus, and a programming means for significantly decreasing the number of instructions required for a dot-product operation. SOLUTION: In one embodiment, the apparatus comprises an execution resource for executing a first instruction decoded to one micro operation. In response to the first instruction, the execution resource calculates the dot product of at least two source operands for a specific data type including an integer and a floating point, and stores the result value in the same register or memory location as one of the source operands. COPYRIGHT: (C)2008,JPO&INPIT

Abstract translation: 要解决的问题：提供一种用于显着减少点产品操作所需指令数量的方法，装置和编程装置。 解决方案：在一个实施例中，该装置包括用于执行解码为一个微操作的第一指令的执行资源。 响应于第一指令，执行资源计算用于包括整数和浮点的特定数据类型的至少两个源操作数的点乘积，并将结果值存储在与源中的一个相同的寄存器或存储器位置 操作数。 版权所有（C）2008，JPO＆INPIT

公开(公告)号：DE102007045187A1

公开(公告)日：2008-04-30

申请号：DE102007045187

申请日：2007-09-21

Applicant: INTEL CORP

Inventor： KAPOOR RAJIV ,  ZOHAR RONEN ,  BUXTON MARK ,  SPERBER ZEEV ,  GOTTLIEB KOBY

IPC: G06F7/499 ,  G06F7/57

Abstract: A method and apparatus for including in processor instructions for performing logical-comparison and branch support operations on packed or unpacked data. In one embodiment, instruction decode logic decodes instructions for an execution unit to operate on packed data elements including logical comparisons. A register file including 128-bit packed data registers stores packed single-precision floating point (SPFP) and packed integer data elements. The logical comparisons may include comparison of SPFP data elements and comparison of integer data elements and setting at least one bit to indicate the results. Based on these comparisons, branch support actions are taken. Such branch support actions may include setting the at least one bit, which in turn may be utilized by a branching unit in response to a branch instruction. Alternatively, the branch support actions may include branching to an indicated target code location.

公开(公告)号：DE112007002101T5

公开(公告)日：2009-07-09

申请号：DE112007002101

申请日：2007-09-20

Applicant: INTEL CORP

Inventor： ZOHAR RONEN ,  SECONI MARK ,  PARTHASARATHY RAJESH ,  CHENNUPATY SRINIVAS ,  BUXTON MARK ,  DESYLVA CHUCK ,  ABDALLAH MOHAMMAD A

IPC: G06F9/30 ,  G06F7/00 ,  G06F9/06

Abstract: Method, apparatus, and program means for performing a dot-product operation. In one embodiment, an apparatus includes execution resources to execute a first instruction. In response to the first instruction, said execution resources store to a storage location a result value equal to a dot-product of at least two operands.