公开(公告)号：JPH08186123A

公开(公告)日：1996-07-16

申请号：JP31686694

申请日：1994-12-20

Applicant: KOREA ELECTRONICS TELECOMM

Inventor： RI KIKOU ,  RI SHINKOU

IPC: H01L29/73 ,  H01L21/331 ,  H01L29/732

Abstract: PURPOSE: To minimize the base-collector and base-emitter parasitic junction capacitance by providing a base electrode, an emitter electrode and a collector electrode connected, respectively, with an external base region, an emitter region and a collector region thereby equalizing the operational characteristics in both directions. CONSTITUTION: A thin film for base electrode or an external base region 24 is composed of polysilicon filling a trench. An oxide 34 is deposited between the external base region 24 filling a trench region and a substrate 21. A conductive base region 27 is formed in the center of a columnar structure. Electrodes 29 are formed in the external base region 24, the emitter 28 region and a part of the collector region 23. In this regard, a conductive thin film 26 wider than the emitter 28 may be formed in order to facilitate formation of a contact hole for interconnection between the emitter 28 and the emitter electrode.

公开(公告)号：JPH05182959A

公开(公告)日：1993-07-23

申请号：JP33062091

申请日：1991-12-13

Applicant: KOREA ELECTRONICS TELECOMM

Inventor： RI KIKOU ,  KIN DAIYOU ,  KIN OUSHIYU

IPC: H01L21/76 ,  H01L21/316

Abstract: PURPOSE: To provide an element isolating method with good electric characteristics even for the isolation of a 0.5 μm design role essential to the development of a highly integrated element of >=16 M bits as one of isolating methods utilizing a silicon substrate by making good use of polysilicon and eliminating a bird's beak generated by a LOCOS method. CONSTITUTION: This is a method which uses polysilicon as a material of silicon at the time of oxidation so as to form oxide for element separation; and an oxide film 12 is grown on the silicon substrate 11 and a nitride film 13 is formed to form a nitride film pattern as well as the LOCOS method. After oxide grown by etching and oxidizing a polysilicon film 15 is etched to above the nitride film by utilizing an etching baking process, the nitride film and oxide film are etched similarly to the advance in the LOCOS process to form the oxide for element separation.

公开(公告)号：JPH03180066A

公开(公告)日：1991-08-06

申请号：JP22953590

申请日：1990-08-29

Applicant: KOREA ELECTRONICS TELECOMM

Inventor： RI KIKOU ,  KIN DAIYOU ,  RI CHINKOU ,  KIN SENJIYU

IPC: H01L27/04 ,  H01L21/02 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/10 ,  H01L27/108

Abstract: PURPOSE: To enlarge the area of a storage capacitor by depositing n polysilicon on a dielectric layer while coupling with an n diffused layer around a trench and on the bottom thereof thereby forming a plate. CONSTITUTION: After forming a primary dielectric layer 43a for capacitor in a trench, n doped polysilicon is deposited to form a secondary dielectric layer 43b. Subsequently, polysilicon is deposited thereon continuously to an n diffused layer around a trench and on the bottom thereof thus forming a plate 45. Since the capacitor between a polysilicon storage electrode 41 and the n diffusion plate 45, as well as the capacitor between the n polysilicon storage electrode 41 and the n diffused plate 45, can be utilized entirely as a storage capacitor, surface efficiency of the storage capacitor can be enhanced.

公开(公告)号：JPH0738066A

公开(公告)日：1995-02-07

申请号：JP33820391

申请日：1991-12-20

Applicant: KOREA ELECTRONICS TELECOMM

Inventor： RI KIKOU ,  SAI SOUKUN ,  YO JUNICHI ,  KIN CHINSHIYOU ,  RI SHINKOU

IPC: H01L27/10 ,  H01L21/337 ,  H01L21/762 ,  H01L21/8242 ,  H01L27/108 ,  H01L29/808

Abstract: PURPOSE: To provide a product having a vertical structure for realizing a highly integrated structure with reduced area of basic cells by arranging switching junction field transistors and storing capacitors to form the vertical structure. CONSTITUTION: Switching junction field transistors are formed on a semiconductor substrate 1, and storing capacitors are stacked on the junction field transistors to arrange these transistors and capacitors in the form of a vertical structure. The transistor has a gate region at a trench sidewall bottom formed by etching the substrate 1, word line 10a insulated from other element word lines through an insulation film 13 and active region 16 on the substrate 1. The storing capacitor has a storage node on a drain junction region, dielectric film 18 on the top of this node, and polysilicon film 19 for a plate electrode which is insulated from the storage node through an oxide film.

公开(公告)号：JPH03228370A

公开(公告)日：1991-10-09

申请号：JP25402090

申请日：1990-09-21

Applicant: KOREA ELECTRONICS TELECOMM

Inventor： RI KIKOU ,  KIN DAIYOU ,  RI CHINKOU ,  KIN SENSHIYU

IPC: H01L27/04 ,  H01L21/02 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/10 ,  H01L27/108

Abstract: PURPOSE: To improve capacitor area efficiency by making a transfer transistor first, forming bit lines, then forming an oxide film lattice with minimum line width between cells and forming single or double cup-shaped polysilicon storage electrode. CONSTITUTION: An activated region is defined, and a transistor is formed by LOCOS or SWAMI method on a silicon substrate 1. Next, a polycide layer 10 for bit line is formed, and a silicon nitride film 11 as an etch stop layer is formed. Moreover, etching is performed and a grid-shaped oxide film 16 is formed to a minimum line width, while defining a contact position 15 between the source portion of a transistor and a storage electrode. Next, a polysilicon electrode 17 is formed, a liquid photosensitive film 18 is coated, an upper end portion of the polysilicon electrode 17 is etched, and a cup-shaped storage electrode is formed. Next, the photosensitive film 18 is removed, and a dielectric film 19 for capacitor and a plate electrode 20 are formed for completion. As a result of this, the area can be increased, while the height of storage electrode can be made the largest, thereby increasing the area efficiency.