公开(公告)号：JP2001196455A

公开(公告)日：2001-07-19

申请号：JP2000328233

申请日：2000-10-27

Applicant: LUCENT TECHNOLOGIES INC

Inventor： NEISU RAYADI ,  MERCHANT SAILESH M ,  MOLLOY SIMON JOHN ,  ROY PRADIP K

IPC: H01L21/302 ,  H01L21/28 ,  H01L21/3065 ,  H01L21/311 ,  H01L21/768 ,  H01L23/522

Abstract: PROBLEM TO BE SOLVED: To reduce the number of processing steps when manufacturing a semiconductor element having a via, which is formed through a material having a low permittivity. SOLUTION: A first conductive layer is formed near the substrate, an etching stopping layer is formed on the first conductive layer, and a dielectric layer is formed on the etching stopping layer. The dielectric layer contains a material having a low permittivity, a via is formed through the dielectric layer to expose the etching stopping layer at the bottom, and a perforated sidewall is formed. At the same time, an etching agent is used which acts together with a material etched from the etching stopping layer. Thus, a polymeric layer covering the sidewall having holes of the via is formed to reduce the steps. On a rear sidewall having a polymeric material etched from the bottom of the via, a barrier metallic layer is formed on the polymeric layer. Further, a seed layer is formed on the barrier metallic layer, and a second conductive layer making contact with the first conductive layer in the via is formed on the seed layer.

公开(公告)号：JPH11260785A

公开(公告)日：1999-09-24

申请号：JP33315198

申请日：1998-11-24

Applicant: LUCENT TECHNOLOGIES INC

Inventor： MOLLOY SIMON JOHN ,  VITKAVAGE DANIEL JOSEPH

IPC: H01L21/302 ,  B08B7/00 ,  G03F7/42 ,  H01L21/304 ,  H01L21/311 ,  H01L21/3065

Abstract: PROBLEM TO BE SOLVED: To eliminate a photoresist layer and its residue generated when viaholes are formed in an integrated device, by making etching residue water-soluble at a specified temperature by gas plasma treatment, and cleaning a substrate with deionized water. SOLUTION: A photoresist layer 31 is patterned in a selected region of a dielectric layer 30 by a photolithography process. The selected region of the dielectric layer 30 is controlled and etched by using an RIE plasma process and reactive etching agent, and obtained structure is arranged in a reaction vessel. A substrate and, in particular, the side wall of a viahole are exposed to mixed gas composed of oxygen, nitrogen and hydrofluorocarbon for about 60 seconds while energy of 1000 W is applied. The temperature is maintained at most 100 deg.C for the whole period, and residue is made soluble in water. Further, the pressure of the reaction vessel is reduced, the photoresist layer 31 is eliminated, the substrate is taken out and cleaning is performed by using deionized water.

公开(公告)号：DE60038423T2

公开(公告)日：2009-04-23

申请号：DE60038423

申请日：2000-10-16

Applicant: LUCENT TECHNOLOGIES INC

Inventor： LAYADI NACE ,  MERCHANT SAILESH MANSINH ,  MOLLOY SIMON JOHN ,  ROY PRADIP KUMAR

IPC: H01L21/302 ,  H01L21/768 ,  H01L21/28 ,  H01L21/3065 ,  H01L21/311 ,  H01L23/522

Abstract: A method for making a semiconductor device (10) includes the steps of forming a first conductive layer (50) adjacent a substrate (52), forming an etch stop layer (54) on the conductive layer, and forming a dielectric layer (56) on the etch stop layer. The dielectric layer includes a material having a low dielectric constant, and a via (12) is formed through the dielectric layer to expose the etch stop layer at the bottom, with porous sidewalls (16) being produced. The exposed etch stop layer (54) is etched using an etchant that cooperates with etched material from the etch stop layer to form a polymeric layer (64) to coat the porous sidewalls of the via. Since the etchant cooperates with the etched material from the etch stop layer to form the polymeric layer coating the porous sidewalls of the via, a separate coating layer deposition step is not required after the via is etched and cleaned. After the porous sidewalls have been coated and polymeric material has been etched from the bottom of the via, a barrier metal layer (66) is formed on the polymeric layer (64), a seed layer (68) is formed on the barrier metal layer, and a second conductive layer (70) is formed on the seed layer contacting the first conductive layer in the via.

公开(公告)号：DE60038423D1

公开(公告)日：2008-05-08

申请号：DE60038423

申请日：2000-10-16

Applicant: LUCENT TECHNOLOGIES INC

Inventor： LAYADI NACE ,  MERCHANT SAILESH MANSINH ,  MOLLOY SIMON JOHN ,  ROY PRADIP KUMAR

IPC: H01L21/302 ,  H01L21/768 ,  H01L21/28 ,  H01L21/3065 ,  H01L21/311 ,  H01L23/522

Abstract: A method for making a semiconductor device (10) includes the steps of forming a first conductive layer (50) adjacent a substrate (52), forming an etch stop layer (54) on the conductive layer, and forming a dielectric layer (56) on the etch stop layer. The dielectric layer includes a material having a low dielectric constant, and a via (12) is formed through the dielectric layer to expose the etch stop layer at the bottom, with porous sidewalls (16) being produced. The exposed etch stop layer (54) is etched using an etchant that cooperates with etched material from the etch stop layer to form a polymeric layer (64) to coat the porous sidewalls of the via. Since the etchant cooperates with the etched material from the etch stop layer to form the polymeric layer coating the porous sidewalls of the via, a separate coating layer deposition step is not required after the via is etched and cleaned. After the porous sidewalls have been coated and polymeric material has been etched from the bottom of the via, a barrier metal layer (66) is formed on the polymeric layer (64), a seed layer (68) is formed on the barrier metal layer, and a second conductive layer (70) is formed on the seed layer contacting the first conductive layer in the via.