公开(公告)号：JP2001196455A

公开(公告)日：2001-07-19

申请号：JP2000328233

申请日：2000-10-27

Applicant: LUCENT TECHNOLOGIES INC

Inventor： NEISU RAYADI ,  MERCHANT SAILESH M ,  MOLLOY SIMON JOHN ,  ROY PRADIP K

IPC: H01L21/302 ,  H01L21/28 ,  H01L21/3065 ,  H01L21/311 ,  H01L21/768 ,  H01L23/522

Abstract: PROBLEM TO BE SOLVED: To reduce the number of processing steps when manufacturing a semiconductor element having a via, which is formed through a material having a low permittivity. SOLUTION: A first conductive layer is formed near the substrate, an etching stopping layer is formed on the first conductive layer, and a dielectric layer is formed on the etching stopping layer. The dielectric layer contains a material having a low permittivity, a via is formed through the dielectric layer to expose the etching stopping layer at the bottom, and a perforated sidewall is formed. At the same time, an etching agent is used which acts together with a material etched from the etching stopping layer. Thus, a polymeric layer covering the sidewall having holes of the via is formed to reduce the steps. On a rear sidewall having a polymeric material etched from the bottom of the via, a barrier metallic layer is formed on the polymeric layer. Further, a seed layer is formed on the barrier metallic layer, and a second conductive layer making contact with the first conductive layer in the via is formed on the seed layer.

公开(公告)号：JP2001176826A

公开(公告)日：2001-06-29

申请号：JP2000306935

申请日：2000-10-06

Applicant: LUCENT TECHNOLOGIES INC

Inventor： SUDAANSHU MISURA ,  MERCHANT SAILESH M ,  ROY PRADIP K

IPC: B24B37/00 ,  C09K3/14 ,  C09K13/00 ,  H01L21/304

Abstract: PROBLEM TO BE SOLVED: To provide a slurry for chemical mechanical polishings(CMP), where its polishing selectivity and removing speed with respect to a barrier metal layer are improved in comparison with a bulk metal layer. SOLUTION: Diethylene triamine penta acetate(DTPA) as a chelating agent is contained in a chemical and mechanical polishing(CMP) slurry for polishing the surface of a metal semiconductor wafer. A CMP process is used to polish the surface of the semiconductor wafer during the step for forming an interconnecting line or a via. The interconnecting line includes a bulk metal layer and a barrier metal layer which are formed over a trench of an insulating layer in the semiconductor wafer. The DTPA increases the polishing selectivity of the slurry, with respect to the barrier metal layer. Concurrently with the increased removing speed of the barrier metal layer, dishing of the bulk metal layer is prevented in the trench during the process of the CMP.

公开(公告)号：JP2001168071A

公开(公告)日：2001-06-22

申请号：JP2000305775

申请日：2000-10-05

Applicant: LUCENT TECHNOLOGIES INC

Inventor： SADOHANSHU MISURA ,  MERCHANT SAILESH M ,  ROY PRADIP K

IPC: B24B37/04 ,  B24B57/02 ,  H01L21/304 ,  H01L21/3205

Abstract: PROBLEM TO BE SOLVED: To provide a method for recirculating slurry continuously during CMP processing without causing any damage on the layer of a semiconductor wafer and/or contamination thereof. SOLUTION: A chemical mechanical polishing(CMP) system comprises an abrasive unit containing abrasive. The abrasive unit holds a semiconductor wafer and provides a relative motion between the semiconductor wafer and an article to be abraded through slurry. The CMP system further comprises a slurry processing unit for processing used slurry from the abrasive unit and delivering the processed slurry to the abrasive unit. The slurry processing unit comprises a metal separator for separating metal particles, abraded from the semiconductor wafer, from used slurry.

公开(公告)号：JP2000208705A

公开(公告)日：2000-07-28

申请号：JP2000004534

申请日：2000-01-13

Applicant: LUCENT TECHNOLOGIES INC

Inventor： MERCHANT SAILESH M ,  MINSEOKU OO ,  ROY PRADIP K ,  IU-HYUUEN UON

IPC: H01L27/04 ,  H01L21/02 ,  H01L21/285 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/06 ,  H01L27/108

Abstract: PROBLEM TO BE SOLVED: To provide an MOM constitution having laminated structure of copper/ tantalum nitride/tantalum pentoxide. SOLUTION: A metal-oxide-metal(MOM) capacitor of an integrated circuit is provided with a first electrode, a tantalum pentoxide layer formed on the first electrode, a first barrier layer formed on the tantalum pentoxide layer, and a second copper electrode formed on the first barrier layer. In an embodiment, the first barrier layer of the MOM capacitor is formed of tantalum nitride.

公开(公告)号：JP2001110751A

公开(公告)日：2001-04-20

申请号：JP2000152242

申请日：2000-05-24

Applicant: LUCENT TECHNOLOGIES INC

Inventor： BHOWMIK SIDDHARTHA ,  MERCHANT SAILESH M ,  MINSEOKU OO ,  PRADIP KUMAR ROY ,  SEN SIDHARTHA

IPC: C23C14/14 ,  C23C16/06 ,  H01L21/28 ,  H01L21/285 ,  H01L21/3205 ,  H01L21/768 ,  H01L23/52

Abstract: PROBLEM TO BE SOLVED: To provide a titanium-tantalum barrier thin film and a method for forming a thin film. SOLUTION: In a titanium-tantalum barrier thin film used together with an interconnecting thin film of copper, a relatively excessive titanium/insufficient tantalum portion is formed near the boundary between the thin film and a dielectric thin film, and a relatively excessive tantalum/insufficient titanium portion is formed near the boundary between the thin film and a conductive interconnecting thin film formed on the barrier layer. Excessive titanium/ insufficient tantalum portion causes the thin film, to firmly stick to the dielectric thin film and the excessive tantalum/insufficient titanium portion suppresses formation of an intermetallic compound by forming a hetero-epitaxial interface with the interconnecting thin film. The single titanium-tantalum thin film, having a compositional gradient from the top to the bottom, can be formed by various techniques including PVD, CVD, sputter deposition using a sputtering target having a uniform composition, and sputter deposition using a plurality of sputtering targets. A synthetic titanium-tantalum thin film is composed of two separately formed thin films.

公开(公告)号：JPH11265887A

公开(公告)日：1999-09-28

申请号：JP33314998

申请日：1998-11-24

Applicant: LUCENT TECHNOLOGIES INC

Inventor： MA YI ,  MERCHANT SAILESH M ,  ROY PRADIP K

IPC: H01L21/28 ,  H01L21/314 ,  H01L21/318 ,  H01L21/32 ,  H01L21/762 ,  H01L29/51

Abstract: PROBLEM TO BE SOLVED: To enable a nitride layer to be released from its inner stress and set uniform in thickness by a method wherein a first sub-layer and a second sub-layer are deposited at different deposition rates, and this deposition process is repeatedly carried out a prescribed number of times to make the nitride layer as thick as required. SOLUTION: A nitride layer 16 is varied in deposition rate with time, a sequence of deposition starts at a low deposition rate and then transfers to a high deposition rate, and this deposition process is carried at deposition rates which are cyclically changed. A gate oxide structure comprises a first oxide layer 14, the nitride layer 16, and a second oxide layer 18. A deposition rate difference can be realized by changing, for instance, a pressure or a gas flow rate or both of them at the same time. For instance, a deposition process of low deposition rate is carried out at a temperature of 750 to 800 deg.C, and a deposition process of high deposition rate is carried out at a temperature of 800 to 850 deg.C. During a deposition term, these changes in deposition rate make deposited nitride serve as sub-layers. Interfaces between the sub-layers function as stress relaxation mechanisms in the gate oxide structure, whereby the multilayered nitride layer 16 is improved in uniformity, and pinholes and micro cracks present in the nitride films are lessened in number.

公开(公告)号：JP2000323683A

公开(公告)日：2000-11-24

申请号：JP2000004787

申请日：2000-01-13

Applicant: LUCENT TECHNOLOGIES INC

Inventor： FRITZINGER LARRY BRUCE ,  LAYADI NACE ,  MERCHANT SAILESH M ,  ROY PRADIP K

IPC: H01G4/33 ,  H01L21/02 ,  H01L21/285 ,  H01L21/316 ,  H01L21/8242 ,  H01L27/108

Abstract: PROBLEM TO BE SOLVED: To obtain a small-sized capacitor which can solve the problem of leakage current or other problems. SOLUTION: The capacitor comprises a conductive plug 7 comprising a top portion comprising sidewalls, and a bottom portion. The bottom portion of the conductive plug 7 is coated with materials 3 and 5 selected form a group consisting of titanium and titanium nitride, and the top portion of the conductive plug 7 is not coated with a material selected form a group consisting of titanium and titanium nitride.

公开(公告)号：JP2000323473A

公开(公告)日：2000-11-24

申请号：JP2000004078

申请日：2000-01-12

Applicant: LUCENT TECHNOLOGIES INC

Inventor： CHEN YUANNING ,  MERCHANT SAILESH M ,  ROY PRADIP K

IPC: H01L21/283 ,  C30B33/00 ,  H01L21/28 ,  H01L21/316 ,  H01L21/318 ,  H01L29/51 ,  H01L29/78

Abstract: PROBLEM TO BE SOLVED: To form an oxide layer which includes graded portions with greatly reduced stress on a silicon substrate. SOLUTION: This method comprises a first step where a first oxide portion 31 is grown by upwardly ramping a silicon substrate 22 to a a first temperature lower than a SiO2 viscoelastic temperature, and the silicon substrate 22 is subjected to an oxidizing atmosphere at the first temperature and for a first time period and a second step where a second oxide portion 32 is grown between the first oxide portion and the silicon substrate by exposing the substrate 22 to an oxidizing atmosphere at a second temperature higher than the SiO2 viscoelastic temperature and for a second time period. The second oxide portion 32 may have a thickness in a range of about 25 to 50% of a total thickness of the graded oxide layer.

公开(公告)号：JP2000208742A

公开(公告)日：2000-07-28

申请号：JP2000004302

申请日：2000-01-13

Applicant: LUCENT TECHNOLOGIES INC

Inventor： MERCHANT SAILESH M ,  ROY PRADIP K

IPC: H01L29/78 ,  H01L21/28 ,  H01L21/77 ,  H01L21/8242 ,  H01L27/108 ,  H01L29/49 ,  H01L29/51

Abstract: PROBLEM TO BE SOLVED: To provide an integrated circuit device having a composite oxide dielectric substance. SOLUTION: This integrated circuit is provided with a semiconductor substrate 10 and a first metal oxide layer 15 adjacent to the substrate 10. The first metal oxide layer 15 is made of tantalum oxide for example. A second metal oxide layer 17, containing an oxide having a comparatively high permittivity such as titanium oxide, zirconium oxide, and ruthenium oxide, is formed on the metal oxide layer 15 on the opposite side to the semiconductor substrate 10, and a metal nitride layer 19 such as titanium nitride is formed on a metal oxide layer on the opposite side to the first metal oxide layer 15. The metal nitride layer contains a metal capable of reducing the first metal oxide layer 15. Therefore, the second metal oxide layer 17 essentially inhits reduction of the first metal oxide layer 15 by means of a metal of the metal nitride layer.

公开(公告)号：JP2000091579A

公开(公告)日：2000-03-31

申请号：JP26060099

申请日：1999-09-14

Applicant: LUCENT TECHNOLOGIES INC

Inventor： AISHIKKU C KIZURUYARI ,  MERCHANT SAILESH M ,  PRADIP KUMAR ROY

IPC: H01L29/78 ,  C23C14/06 ,  H01L21/28 ,  H01L21/285 ,  H01L21/336 ,  H01L29/49

Abstract: PROBLEM TO BE SOLVED: To prevent boron from diffusing up from the source and drain by making nitride exist in a synthetic gate electrode. SOLUTION: A synthetic gate electrode 16 consists of a tungsten silicide layer 17, formed on the gate dielectric 13 and the tungsten silicide nitride, WSixNy, a layer 18 formed thereon, and all the layers are deposited in one operation process in formation of a synthetic gate electrode layer. Then, an intermediate layer dielectric is deposited after the source 21 and drain 22 are formed through ion implantation, a second layer metal is deposited and subjected to pattern formation, another intermediate layer dielectric is deposited, a source/ drain contact window is shaped. Source and drain contact metallization is deposited and is subjected to pattern formation and contacts 24, 25 for a source and a drain are formed. A tungsten silicide layer is satisfactory in sticking property to a gate dielectric, and a tungsten silicon nitride layer becomes an effective barrier with respect to boron diffusion.