公开(公告)号：JP2001053247A

公开(公告)日：2001-02-23

申请号：JP2000228309

申请日：2000-07-28

Applicant: LUCENT TECHNOLOGIES INC

Inventor： CHAUDHRY SAMIR ,  CHETLUR SUNDAR SRINIVASAN ,  NEISU RAYADI ,  ROY PRADIP KUMAR ,  VAIDYA HEM M

IPC: H01L27/108 ,  H01L21/02 ,  H01L21/768 ,  H01L21/8242

Abstract: PROBLEM TO BE SOLVED: To provide the manufacturing method of a capacitor, which increases the capacity of the capacitor without reducing reliability of the capacitor. SOLUTION: This manufacturing method of this capacitor has a step of form an interconnection line 26 over a substrate 24, a step of depositing a first dielectric layer 28 on the line 26, a step of etching a through hole (increases toward the direction of the substrate and has a width of a tapered form) in the layer 28, a step of filling a conductive metal layer in the through hole for forming a metallic plug 32 in the layer 28, a step of etching a trench 30 in the layer 28 on the periphery of the upper part of the plug 32, a step of deposing a second dielectric layer 38 on a lower electric layer 36, in close proximity to the plug 32 and a step to deposit an upper electrode layer 40 on the layer 28.

公开(公告)号：JP2001077331A

公开(公告)日：2001-03-23

申请号：JP2000228310

申请日：2000-07-28

Applicant: LUCENT TECHNOLOGIES INC

Inventor： CHETLUR SUNDAR SRINIVASAN ,  CLEMENS JAMES THEODORE ,  MERCHANT SAILESH MANSINH ,  ROY PRADIP KUMAR ,  VAIDYA HEM M

IPC: H01L21/8242 ,  H01L21/02 ,  H01L21/768 ,  H01L27/108

Abstract: PROBLEM TO BE SOLVED: To increase the capacitance of a capacitor without decreasing its reliability by forming an upper electrode on a first electrode which is integrated with a trench formed in a first dielectric layer near a metal plug body and comes in contact with the metal plug and on a second dielectric layer formed near an upper portion. SOLUTION: A first metal plug 30 upwardly extends in the middle portion of a first trench 28, and an interconnection line 32 is formed on the first trench and makes contact with the first metal plug which determines an anchor recess 34 on the opposite side. The first trench 28 forms the anchor recess 34 when the interconnection line 32 is formed. This forms a directly equivalent recess in a conductive layer 52 of the interconnection line 32. The interconnection line 32 has a conductive capping layer 50, the conductive layer 52, and an electromigration barrier layer 54. A second trench 38 on a second dielectric layer 36 above the interconnection line 32 is formed near an anchor metal plug 22 to give an IC capacitor 20 larger surface area.

公开(公告)号：JPH1174265A

公开(公告)日：1999-03-16

申请号：JP16977498

申请日：1998-06-17

Applicant: LUCENT TECHNOLOGIES INC

Inventor： BRADY DAVID C ,  KIZILYALLI ISIK C ,  ROY PRADIP K ,  VAIDYA HEM M

IPC: H01L21/316 ,  H01L21/318 ,  H01L21/32 ,  H01L21/76

Abstract: PROBLEM TO BE SOLVED: To prevent lifting phenomenon of a laminate of a semiconductor structure, especially with a pad oxide layer by constituting an insulative structured body of a uniform thickness by forming a first laminated sub-layer at a first deposit speed and a second laminated sub-layer at a second deposit speed on a substrate one by one. SOLUTION: A first laminated sub-layer is formed at a first deposit speed and a second laminated sub-layer is formed at a second deposit speed on a substrate, constituting an insulation structure body of a uniform thickness. The first deposit speed in the range of 0.5 to 1 nm/minute is desirable, and the second deposit velocity in the range of 3 to 5 nm/minute is desirable. Move specifically, a field oxide 20 is insulated and formed between insulation structure bodies 16 on a semiconductor wafer 10. The thin field oxide 20 of about 150 to 250 nm reduces a length of bird's beak and reduces relief phenomenon of a lamination body. A stress inside the insulation structure body 16 is reduced since the lifting phenomenon is reduced.