公开(公告)号：WO2007050346A3

公开(公告)日：2007-06-21

申请号：PCT/US2006040401

申请日：2006-10-13

Applicant: MOTOROLA INC ,  RASUL AMJAD S ,  BRAZIS PAUL W ,  GAMOTA DANIEL R ,  SKIPOR ANDREW F ,  ZHANG JIE

Inventor： RASUL AMJAD S ,  BRAZIS PAUL W ,  GAMOTA DANIEL R ,  SKIPOR ANDREW F ,  ZHANG JIE

IPC: C09D11/00

CPC classification number: H05K1/162 ,  H05K2201/0209 ,  H05K2201/0257 ,  H05K2203/013

Abstract: A functional ink (200) suitable for use as a dielectric layer (303) in a printed semiconductor device (300) comprises a dielectric carrier (201) and a plurality of dielectric particles (202) sized less than about 1,000 nanometers that are disposed within the dielectric carrier. In a preferred approach the dielectric carrier comprises a dielectric resin and the dielectric particles comprise a ferroelectric material (such as, but not limited to, BaTiO 3 . So provided, this functional ink can be applied to a substrate (301) of choice through a printing technique of choice to thereby provide a resultant printed semiconductor device, such as a field effect transistor, having a relatively thin dielectric layer comprised of this functional ink.

Abstract translation: 适合用作印刷半导体器件（300）中的电介质层（303）的功能油墨（200）包括电介质载体（201）和尺寸小于约1000纳米的多个电介质颗粒（202） 电介质载体。 在优选的方法中，电介质载体包括电介质树脂，并且电介质颗粒包含铁电材料（例如但不限于BaTiO 3 N 3）。因此，该功能性油墨可以应用于基底 （301），通过选择的打印技术来选择，从而提供具有由该功能性墨水组成的相对薄的介电层的所得印刷半导体器件，例如场效应晶体管。

公开(公告)号：WO2007050403A2

公开(公告)日：2007-05-03

申请号：PCT/US2006040791

申请日：2006-10-20

Applicant: MOTOROLA INC ,  BRAZIS PAUL W ,  GAMOTA DANIEL R ,  TSUI KIN P ,  SZCZECH JOHN B ,  ZHANG JIE

Inventor： BRAZIS PAUL W ,  GAMOTA DANIEL R ,  TSUI KIN P ,  SZCZECH JOHN B ,  ZHANG JIE

IPC: H03K19/094

CPC classification number: H03K19/01721 ,  H03K19/09441

Abstract: An inverter circuit (500) having a drive transistor (102) that operably couples to a voltage bias input (101) (and where that drive transistor controls the inverter circuit output by opening and closing a connection between the output (105) and ground (104)) is further operably coupled to a feedback switch (401). In a preferred approach the feedback switch is itself also operably coupled to the voltage bias input and the output and preferably serves, when the drive transistor is switched "off", to responsively couple the voltage bias input to the drive transistor in such a way as to cause a gate terminal of the drive transistor to have its polarity relative to a source terminal of the drive transistor reversed and hence permit the inverter circuit to operate across a substantially full potential operating range of the drive transistor.

Abstract translation: 一种具有可操作地耦合到电压偏置输入（101）的驱动晶体管（102）的逆变器电路（500），并且其中驱动晶体管通过打开和关闭输出（105）和地（ 104））进一步可操作地耦合到反馈开关（401）。 在优选的方法中，反馈开关本身也可操作地耦合到电压偏置输入端和输出端，并且优选地在驱动晶体管被切换为“断开”时，将电压偏置输入端以这样的方式响应地耦合到驱动晶体管： 以使驱动晶体管的栅极端子相对于驱动晶体管的源极端子的极性相反，从而允许逆变器电路在驱动晶体管的基本上全部的电位工作范围内工作。

公开(公告)号：WO2004061906A3

公开(公告)日：2005-06-23

申请号：PCT/US0340469

申请日：2003-12-18

Applicant: MOTOROLA INC

Inventor： ZHANG JIE ,  GAMOTA DANIEL ,  ZHANG MIN-XIAN ,  BRAZIS PAUL ,  KALYANASUNDARAM KRISHNA

IPC: H01L51/00 ,  H01L51/30 ,  H01L51/40 ,  H01L35/24

CPC classification number: H01L51/0516 ,  H01L51/0024 ,  H01L51/0036 ,  H01L51/0051 ,  H01L51/0078 ,  H01L51/0084

Abstract: Organic field effect transistors (OFETs) can be created rapidly and at low cost on organic films by using a multilayer film (202) that has an electrically conducting layer (204, 206) on each side of a dielectric core. The electrically conducting layer is patterned to form gate electrodes (214), and a polymer film (223) is attached onto the gate electrode side of the multilayer dielectric film, using heat and pressure (225) or an adhesive layer (228). A source electrode and a drain electrode (236) are then fashioned on the remaining side of the multilayer dielectric film, and an organic semiconductor (247) is deposited over the source and drain electrodes, so as to fill the gap between the source and drain electrodes and touch a portion of the dielectric film to create an organic field effect transistor.

Abstract translation: 有机场效应晶体管（OFET）可以通过使用在介质芯的每一侧上具有导电层（204,206）的多层膜（202）在有机膜上快速且低成本地产生。 图案化导电层以形成栅电极（214），并且使用热和压力（225）或粘合剂层（228）将聚合物膜（223）附着到多层电介质膜的栅电极侧。 然后在多层电介质膜的剩余侧上形成源电极和漏电极（236），并且在源电极和漏电极上沉积有机半导体（247），以填充源极和漏极之间的间隙 电极并且接触电介质膜的一部分以产生有机场效应晶体管。

公开(公告)号：WO2007050579A3

公开(公告)日：2009-04-23

申请号：PCT/US2006041429

申请日：2006-10-24

Applicant: MOTOROLA INC ,  BRAZIS PAUL W ,  GAMOTA DANIEL R ,  KALYANASUNDARAM KRISHNA ,  ZHANG JIE

Inventor： BRAZIS PAUL W ,  GAMOTA DANIEL R ,  KALYANASUNDARAM KRISHNA ,  ZHANG JIE

IPC: H01L29/76 ,  H01L21/335

CPC classification number: H01L29/41733 ,  H01L27/1292 ,  H01L51/0022 ,  H01L51/055 ,  H01L51/102 ,  H01L2924/19043 ,  H01L2924/30105

Abstract: An apparatus (200) such as a semiconductor device comprises a gate electrode (201) and at least a first electrode (202). The first electrode preferably has an established perimeter that at least partially overlaps with respect to the gate electrode to thereby form a corresponding transistor channel. In a preferred approach the first electrode has a surface area that is reduced notwithstanding the aforementioned established perimeter. This, in turn, aids in reducing any corresponding parasitic capacitance. This reduction in surface area may be accomplished, for example, by providing openings (203) through certain portions of the first electrode.

Abstract translation: 诸如半导体器件的装置（200）包括栅电极（201）和至少第一电极（202）。 第一电极优选地具有与栅电极至少部分重叠的确定的周边，从而形成对应的晶体管沟道。 在优选的方法中，尽管具有上述建立的周长，第一电极具有减小的表面积。 这又有助于减少任何相应的寄生电容。 表面积的这种减小可以例如通过提供通过第一电极的某些部分的开口（203）来实现。

公开(公告)号：WO2009032515A2

公开(公告)日：2009-03-12

申请号：PCT/US2008073538

申请日：2008-08-19

Applicant: MOTOROLA INC ,  BRAZIS PAUL W ,  GAMOTA DANIEL R ,  MCCLURE DALE R ,  SKIPOR ANDREW F ,  ZHANG JIE

Inventor： BRAZIS PAUL W ,  GAMOTA DANIEL R ,  MCCLURE DALE R ,  SKIPOR ANDREW F ,  ZHANG JIE

IPC: H01L51/40 ,  H01L29/78 ,  H05K3/40

CPC classification number: H01L21/02601 ,  H01L21/02422 ,  H01L21/02521 ,  H01L21/02628

Abstract: A low-temperature process for creating a semiconductive device by printing a liquid composition containing semiconducting nanoparticles. The semiconductive device is formed on a polymeric substrate (22) by printing a composition that contains nanoparticles of inorganic semiconductor suspended in a carrier, using a graphic arts printing method. The printed deposit is then heated to remove substantially all of the carrier from the printed deposit (25). The low-temperature process does not heat the substrate or the printed deposit above 300° C. The mobility of the resulting semiconductive device is between about 10 cm2/Vs and 200 cm2/Vs.

Abstract translation: 通过印刷含有半导体纳米颗粒的液体组合物来产生半导体器件的低温方法。 通过使用印刷技术印刷方法印刷含有悬浮在载体中的无机半导体的纳米颗粒的组合物，在聚合物基材（22）上形成半导体装置。 然后加热印刷的沉积物以从印刷沉积物（25）中基本上除去所有的载体。 低温工艺不会将衬底或印刷沉积物加热到300℃以上。所得半导体器件的迁移率在约10cm 2 / Vs至200cm 2 / Vs之间。

公开(公告)号：WO2008016750A2

公开(公告)日：2008-02-07

申请号：PCT/US2007071179

申请日：2007-06-14

Applicant: MOTOROLA INC ,  JONNALAGADDA KRISHNA D ,  CHASON MARC K ,  GAMOTA DANIEL R ,  ZHANG JIE

Inventor： JONNALAGADDA KRISHNA D ,  CHASON MARC K ,  GAMOTA DANIEL R ,  ZHANG JIE

IPC: H05B33/00

CPC classification number: H05B33/06

Abstract: An electroluminescent display contains an array of dynamically addressable pixels. The pixels are arranged on one side of a carrier substrate. Conductive vias in the substrate are electrically connected to each of the pixels. Each pixel consists of a bottom electrode that is coupled to a via, an electroluminescent material, and a dielectric material. A common top electrode is disposed on the dielectric material. A driver circuit conductor or connector is situated on the other side of the substrate and is electrically coupled to each of the conductive vias and to the common top electrode, so that each pixel can be individually addressed to illuminate the electroluminescent material on individual pixels.

Abstract translation: 电致发光显示器包含动态可寻址像素的阵列。 像素布置在载体衬底的一侧上。 衬底中的导电通孔电连接到每个像素。 每个像素由耦合到通孔，电致发光材料和介电材料的底部电极组成。 公共顶部电极设置在电介质材料上。 驱动器电路导体或连接器位于衬底的另一侧，并且电耦合到每个导电通孔和公共顶部电极，使得每个像素可被单独寻址以照射各个像素上的电致发光材料。

公开(公告)号：WO2006007343A3

公开(公告)日：2006-10-12

申请号：PCT/US2005020300

申请日：2005-06-09

Applicant: MOTOROLA INC ,  ADEWOLE HAKEEM B ,  BRAZIS PAUL W ,  GAMOTA DANIEL R ,  WIELGUS JERZY ,  ZHANG JIE

Inventor： ADEWOLE HAKEEM B ,  BRAZIS PAUL W ,  GAMOTA DANIEL R ,  WIELGUS JERZY ,  ZHANG JIE

IPC: H01L21/00 ,  B41J2/175

CPC classification number: H01L51/0097 ,  H01L27/283 ,  H01L51/0004 ,  Y02E10/549

Abstract: Two or more semiconductor devices (21 and 22) are formed on a substrate (20) and are each comprised of a plurality of printed components (23 and 24). At least one such printed component (25) is shared by both such semiconductor devices.

Abstract translation: 两个或多个半导体器件（21和22）形成在衬底（20）上并且各自包括多个印刷部件（23和24）。 至少一个这样的印刷部件（25）由这两个半导体器件共用。

公开(公告)号：WO03065409A3

公开(公告)日：2003-10-16

申请号：PCT/US0241765

申请日：2002-12-31

Applicant: MOTOROLA INC

Inventor： CHOWDHURI ABHIJIT R ,  ZHANG JIE ,  GAMOTA DANIEL R

IPC: H01L51/00 ,  H01L51/05 ,  H01L51/30 ,  H01L51/40

CPC classification number: H01L51/0003 ,  H01L51/0004 ,  H01L51/0007 ,  H01L51/0036 ,  H01L51/0512

Abstract: The present invention (Figure 1) is directed to semiconductor films and a process for their preparation. In accordance with the process of the present invention, semiconductor organic material is blended with a multi-component solvent blend and the blend is deposited on a receiving material to provide a continuous highly ordered film having greater periodicity than films produced with a single solvent/semiconducting material blend under similar processing conditions.

Abstract translation: 本发明（图1）涉及半导体膜及其制备方法。 根据本发明的方法，将半导体有机材料与多组分溶剂共混物共混，并将共混物沉积在接收材料上，以提供具有比用单一溶剂/半导体制备的膜具有更大周期性的连续高阶膜 材料混合在相似的加工条件下。

公开(公告)号：WO2008127365A2

公开(公告)日：2008-10-23

申请号：PCT/US2007081446

申请日：2007-10-16

Applicant: MOTOROLA INC ,  SZCZECH JOHN B ,  ZHANG JIE ,  WIELGUS JERZY ,  GAMOTA DANIEL R

Inventor： SZCZECH JOHN B ,  ZHANG JIE ,  WIELGUS JERZY ,  GAMOTA DANIEL R

IPC: H05K3/46 ,  H05K1/16

CPC classification number: H05K1/16 ,  H05K1/0269 ,  H05K1/162 ,  H05K1/167 ,  H05K3/1216 ,  H05K3/1275 ,  H05K2201/09936 ,  H05K2203/0108 ,  H05K2203/0271 ,  H05K2203/0278 ,  H05K2203/161 ,  H05K2203/163 ,  Y10T428/24802 ,  Y10T428/24893

Abstract: In a printed electronic device and methods for determining the electrical value of the device, a dielectric material 130 is contact printed on a substrate 110 using a preset force. The substrate 110 has a pressure sensitive material 120 that is optically responsive in direct proportion to the amount of force imparted by the contact printing. The force of the contact printing causes the pressure sensitive material to form a pattern that is quantifiable to the amount of feree. The pattern is then optically inspected and compared to sets of standards in order to quantify the amount of feree that was used in printing. The thickness of the printed dielectric material is then calculated based on the quantified force by comparing to another set of standards.

Abstract translation: 在用于确定器件的电值的印刷电子器件和方法中，使用预设力将电介质材料130接触印刷在基板110上。 基底110具有压敏材料120，该压敏材料120的光学响应与接触印刷赋予的力的量成正比。 接触印刷的力导致压敏材料形成可量化的量的图案。 然后对图案进行光学检查并与各组标准进行比较，以便量化打印中使用的大小。 然后通过与另一组标准进行比较，基于量化的力来计算印刷介电材料的厚度。

公开(公告)号：WO2007050428A3

公开(公告)日：2008-10-23

申请号：PCT/US2006040894

申请日：2006-10-19

Applicant: MOTOROLA INC ,  BRAZIS PAUL W ,  GAMOTA DANIEL R ,  KALYANASUNDARAM KRISHNA ,  ZHANG JIE ,  JONNALAGADDA KRISHNA D

Inventor： BRAZIS PAUL W ,  GAMOTA DANIEL R ,  KALYANASUNDARAM KRISHNA ,  ZHANG JIE ,  JONNALAGADDA KRISHNA D

IPC: G01L9/00

CPC classification number: H01L22/14 ,  H01L51/0005

Abstract: A printing platform receives (102) (preferably in-line with a semiconductor device printing process (101)) a substrate having at least one semiconductor device printed thereon and further having a test structure printed thereon, which test structure comprises at least one printed semiconductor layer. These teachings then provide for the automatic testing (103) of the test structure with respect to at least one static (i.e., relatively unchanging) electrical characteristic metric. The static electrical characteristic metric (or metrics) of choice will likely vary with the application setting but can include, for example, a measure of electrical resistance, a measure of electrical reactance, and/or a measure of electrical continuity. Optionally (though preferably) the semiconductor device printing process itself is then adjusted (105) as a function, at least in part, of this metric.

Abstract translation: 印刷平台接收（优选地与半导体器件印刷工艺（101）成直角））具有印刷在其上的至少一个半导体器件并且还具有印刷在其上的测试结构的衬底，该测试结构包括至少一个印刷半导体 层。 然后，这些教导提供了关于至少一个静态（即，相对不变的）电特性度量的测试结构的自动测试（103）。 选择的静态电特性度量（或度量）可能随着应用设置而变化，但是可以包括例如电阻的测量，电抗的测量和/或电连续性的测量。 可选地（尽管优选地），然后至少部分地基于该度量来调整（105）半导体器件打印过程本身。