-
公开(公告)号：WO2016138269A1
公开(公告)日：2016-09-01
申请号：PCT/US2016/019571
申请日：2016-02-25
Applicant: QUALCOMM INCORPORATED
Inventor： SUGUMAR, Suresh , GEMAR, Jeffrey , TAHA, Ali , DERBYSHIRE, Amy , XUE, Tao , TAMJIDI, Mohammad , MITTAL, Rajat
IPC: G06F1/32
CPC classification number: G06F1/3296 , G06F1/3206 , G06F1/3243 , G06F1/3287 , Y02D10/152
Abstract: An apparatus includes a first circuit and a second circuit sharing an instruction stream. A voltage controller circuit is configured to provide an operation voltage and at least one low-power voltage to the second circuit independent of a supply voltage of the first circuit in response to a sequence of the instruction stream. In another aspect, a method of operating a power management function is presented. The method includes providing an instruction stream for a first circuit and a second circuit and providing selectively an operation voltage and at least one low-power voltage to the second circuit independent of a supply voltage of the first circuit in response to a sequence of the instruction stream.
Abstract translation: 一种装置包括第一电路和共享指令流的第二电路。 电压控制器电路被配置为响应于指令流的序列，独立于第一电路的电源电压而向第二电路提供操作电压和至少一个低功率电压。 另一方面，提出了一种操作电源管理功能的方法。 该方法包括提供用于第一电路和第二电路的指令流，并响应于该指令的序列而独立于第一电路的电源电压而选择性地向第二电路提供操作电压和至少一个低功率电压 流。
-
公开(公告)号：WO2017136099A3
公开(公告)日：2017-08-10
申请号：PCT/US2017/012514
申请日：2017-01-06
Applicant: QUALCOMM INCORPORATED
Inventor： ALAVOINE, Olivier , LEE, Sejoong , KAZI, Tauseef , BOOTH, Simon , REGINI, Edoardo , JAKUSHOKAS, Renatas , PATODIA, Saurabh , GEMAR, Jeffrey , LO, Haw-Jing , CHAMARTY, Vinod , ANDREEV, Boris , SHEN, Tao , BHASKARA, Aravind , WANG, Wenbiao , MOLLOY, Stephen
IPC: G06F1/32
Abstract: Various aspects include methods for managing memory subsystems on a computing device. Various aspect methods may include determining a period of time to force a memory subsystem on the computing device into a low power mode, inhibiting memory access requests to the memory subsystem during the determined period of time, forcing the memory subsystem into the low power mode for the determined period of time, and executing the memory access requests to the memory subsystem inhibited during the determined period of time in response to expiration of the determined period of time.
-
公开(公告)号：WO2017136099A2
公开(公告)日：2017-08-10
申请号：PCT/US2017/012514
申请日：2017-01-06
Applicant: QUALCOMM INCORPORATED
Inventor： ALAVOINE, Olivier , LEE, Sejoong , KAZI, Tauseef , BOOTH, Simon , REGINI, Edoardo , JAKUSHOKAS, Renatas , PATODIA, Saurabh , GEMAR, Jeffrey , LO, Haw-Jing , CHAMARTY, Vinod , ANDREEV, Boris , SHEN, Tao , BHASKARA, Aravind , WANG, Wenbiao , MOLLOY, Stephen
CPC classification number: G06F3/0659 , G06F1/3275 , G06F3/0625 , G06F3/0673 , G06F12/08 , Y02D10/13 , Y02D10/14
Abstract: Various aspects include methods for managing memory subsystems on a computing device. Various aspect methods may include determining a period of time to force a memory subsystem on the computing device into a low power mode, inhibiting memory access requests to the memory subsystem during the determined period of time, forcing the memory subsystem into the low power mode for the determined period of time, and executing the memory access requests to the memory subsystem inhibited during the determined period of time in response to expiration of the determined period of time.
Abstract translation: 各种方面包括用于管理计算设备上的存储器子系统的方法。 各种方面方法可以包括确定强制计算设备上的存储器子系统进入低功率模式的时间段，在确定的时间段期间禁止对存储器子系统的存储器访问请求，迫使存储器子系统进入低功率模式 所确定的时间周期，并且响应于所确定的时间段的期满，在所确定的时间段期间向存储器子系统执行存储器访问请求。
-
公开(公告)号：WO2023009241A1
公开(公告)日：2023-02-02
申请号：PCT/US2022/033967
申请日：2022-06-17
Applicant: QUALCOMM INCORPORATED
Inventor： IPEK, Engin , RYCHLIK, Bohuslav , PATSILARAS, George , KULKARNI, Prajakt , HANKENDI, Can , ALI, Fahad , GEMAR, Jeffrey , SEVERSON, Matthew
Abstract: The energy consumed by data transfer in a computing device may be reduced by transferring data that has been encoded in a manner that reduces the number of one "1" data values, the number of signal level transitions, or both. A data destination component of the computing device may receive data encoded in such a manner from a data source component of the computing device over a data communication interconnect, such as an off-chip interconnect. The data may be encoded using minimum Hamming weight encoding, which reduces the number of one "1" data values. The received data may be decoded using minimum Hamming weight decoding. For other computing devices, the data may be encoded using maximum Hamming weight encoding, which increases the number of one "1" data values while reducing the number of zero "0" values, if reducing the number of zero values reduces energy consumption.
-
公开(公告)号：WO2017052928A1
公开(公告)日：2017-03-30
申请号：PCT/US2016/048460
申请日：2016-08-24
Applicant: QUALCOMM INCORPORATED
Inventor： CAO, Lipeng , GEMAR, Jeffrey , VILANGUDIPITCHAI, Ramaprasath
CPC classification number: H03K3/012 , H03K3/0372 , H03K3/356008 , H03K3/3562
Abstract: Data retention circuitry, such as at least one integrated circuit (IC), is disclosed herein for power multiplexing with flip flops having a retention feature. In an example aspect, an IC includes a first power rail and a second power rail. The IC further includes a flip-flop and power multiplexing circuitry. The flip flop includes a master portion and a slave portion. The master portion is coupled to the first power rail for a regular operational mode and for a retention operational mode. The power multiplexing circuitry is configured to couple the slave portion to the first power rail for the regular operational mode and to the second power rail for the retention operational mode.
Abstract translation: 本文公开了诸如至少一个集成电路（IC）的数据保持电路，用于具有保留特征的触发器的功率复用。 在示例方面，IC包括第一电源轨和第二电源轨。 IC还包括触发器和功率复用电路。 触发器包括主部和从部。 主部分耦合到第一电力轨道用于常规操作模式和保持操作模式。 功率复用电路被配置为将从属部分耦合到用于常规操作模式的第一电力轨和用于保持操作模式的第二电力轨。
-
Patent Agency Ranking
公开(公告)号：EP4519771A1
公开(公告)日：2025-03-12
申请号：EP23724443.9
申请日：2023-04-05
Applicant: QUALCOMM INCORPORATED
Inventor： IPEK, Engin , OMAR, Hamza , RYCHLIK, Bohuslav , KUANR, Saumya Ranjan , DASHTIPOUR, Behnam , LO, Michael Hawjing , GEMAR, Jeffrey , SEVERSON, Matthew , PATSILARAS, George , TURNER, Andrew Edmund
IPC: G06F13/16 , G11C11/406
-
公开(公告)号：EP3411775A2
公开(公告)日：2018-12-12
申请号：EP17701232.5
申请日：2017-01-06
Applicant: Qualcomm Incorporated
Inventor： ALAVOINE, Olivier , LEE, Sejoong , KAZI, Tauseef , BOOTH, Simon , REGINI, Edoardo , JAKUSHOKAS, Renatas , PATODIA, Saurabh , GEMAR, Jeffrey , LO, Haw-Jing , CHAMARTY, Vinod , ANDREEV, Boris , SHEN, Tao , BHASKARA, Aravind , WANG, Wenbiao , MOLLOY, Stephen
IPC: G06F1/32
CPC classification number: G06F3/0659 , G06F1/3275 , G06F3/0625 , G06F3/0673 , G06F12/08 , Y02D10/13 , Y02D10/14
Abstract: Various aspects include methods for managing memory subsystems on a computing device. Various aspect methods may include determining a period of time to force a memory subsystem on the computing device into a low power mode, inhibiting memory access requests to the memory subsystem during the determined period of time, forcing the memory subsystem into the low power mode for the determined period of time, and executing the memory access requests to the memory subsystem inhibited during the determined period of time in response to expiration of the determined period of time.
-
公开(公告)号：EP4515408A1
公开(公告)日：2025-03-05
申请号：EP23719541.7
申请日：2023-03-29
Applicant: QUALCOMM INCORPORATED
Inventor： IPEK, Engin , OMAR, Hamza , RYCHLIK, Bohuslav , GEMAR, Jeffrey , SEVERSON, Matthew , LO, Michael Hawjing , SUH, Jungwon
-
公开(公告)号：EP3353893B1
公开(公告)日：2019-04-10
申请号：EP16767062.9
申请日：2016-08-24
Applicant: Qualcomm Incorporated
Inventor： CAO, Lipeng , GEMAR, Jeffrey , VILANGUDIPITCHAI, Ramaprasath
IPC: H03K3/012 , H03K3/356 , H03K3/037 , H03K3/3562
-
公开(公告)号：EP4378082A1
公开(公告)日：2024-06-05
申请号：EP22751181.3
申请日：2022-06-17
Applicant: QUALCOMM INCORPORATED
Inventor： IPEK, Engin , RYCHLIK, Bohuslav , PATSILARAS, George , KULKARNI, Prajakt , HANKENDI, Can , ALI, Fahad , GEMAR, Jeffrey , SEVERSON, Matthew
CPC classification number: H03M7/6047 , H03M7/04 , H03M5/145 , G11C7/1006 , Y02D10/00
-
-
-
-
-
-
-
-
-
Search Results
12
records
(took 0.022 seconds)
