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    MULTI-MODE MIXER
    2.
    发明申请
    MULTI-MODE MIXER 审中-公开

    公开(公告)号：WO2020236801A1

    公开(公告)日：2020-11-26

    申请号：PCT/US2020/033576

    申请日：2020-05-19

    Applicant: QUALCOMM INCORPORATED

    Inventor： PATEL, Chirag Dipak ,  GOLDBLATT, Jeremy ,  FENG, Yunfei ,  LIU, Li ,  YU, Xinmin ,  HOMAYOUN, Aliakbar

    IPC: H03D7/12 ,  H03D7/14

    Abstract: An apparatus is disclosed for mixing signals with a multi-mode mixer for frequency translation. In example implementations, a multi-mode mixer includes a supply voltage node, a ground node, a first data signal coupler, and a second data signal coupler. The multi-mode mixer also includes a mixer core and a current control switch. The mixer core is coupled between the first data signal coupler and the second data signal coupler. The current control switch is configured to selectively enable or disable flow of a current through the mixer core. The first data signal coupler, the second data signal coupler, the mixer core, and the current control switch are coupled together in series between the supply voltage node and the ground node.

    BIAS CIRCUIT FOR MAINTAINING A CONSTANT VALUE OF TRANSCONDUCTANCE DIVIDED BY LOAD CAPACITANCE
    3.
    发明申请
    BIAS CIRCUIT FOR MAINTAINING A CONSTANT VALUE OF TRANSCONDUCTANCE DIVIDED BY LOAD CAPACITANCE 审中-公开

    公开(公告)号：WO2002061519A3

    公开(公告)日：2002-08-08

    申请号：PCT/US2002/003012

    申请日：2002-01-30

    Applicant: QUALCOMM INCORPORATED

    Inventor： BAZARJANI, Seyfollah ,  GOLDBLATT, Jeremy

    IPC: G05F3/20

    Abstract: A bias circuit (126) is described for use in biasing an operational amplifier (110) to maintain a constant transconductance divided by load capacitance (i.e. a constant gm /C L ) despite temperature and process variations and despite body effects. The bias circuit (126) includes a pair of current source devices and a switched capacitor (SC) equivalent resistor circuit (136) for developing an equivalent resistance between the current source devices. By providing an SC equivalent resistor circuit clocked by non-overlapping fixed clock signals, the gm /C L of the bias circuit is maintained substantially constant. Hence, a fixed bandwidth is maintained within the operation amplifier being biased. When employed in connection with operational amplifiers of an SC circuit, the constant bandwidth enables the SC circuit to operate at a constant switching speed despite temp and process variation. Furthermore, by positioning the resistance equivalent circuit (136) between the current source devices of the bias circuit, voltage differentials between the sources are eliminated thereby removing any threshold voltage mismatch and thus compensating for body effect variations.

    SOURCE FOLLOWER BASED ENVELOPE TRACKING FOR POWER AMPLIFIER BIASING
    5.
    发明申请
    SOURCE FOLLOWER BASED ENVELOPE TRACKING FOR POWER AMPLIFIER BIASING 审中-公开
    SOURCE FOLLOWER基于信号跟踪功率放大器偏置

    公开(公告)号：WO2018080713A1

    公开(公告)日：2018-05-03

    申请号：PCT/US2017/053827

    申请日：2017-09-27

    Applicant: QUALCOMM INCORPORATED

    Inventor： CHEN, Jiang ,  GOLDBLATT, Jeremy ,  CABANILLAS, Jose

    IPC: H03F1/02 ,  H03F1/32 ,  H03F3/189 ,  H03F3/193

    CPC classification number: H03G3/3042 ,  H03F1/0266 ,  H03F1/223 ,  H03F1/32 ,  H03F1/56 ,  H03F3/189 ,  H03F3/193 ,  H03F3/21 ,  H03F3/245 ,  H03F3/45179 ,  H03F3/505 ,  H03F2200/102 ,  H03F2200/211 ,  H03F2200/222 ,  H03F2200/318 ,  H03F2200/387 ,  H03F2200/411 ,  H03F2200/537 ,  H03F2200/69 ,  H03F2203/45394 ,  H03G2201/106

    Abstract: A power amplifier bias circuit with embedded envelope detection includes a bias circuit stage coupled to an envelope detector circuit to increases a bias provided to a power amplifier as a function of an incoming envelope signal. The envelope detector circuit includes a first source/emitter follower transistor, a current source, and a filter to generate a baseband envelope signal. The current source is coupled to an output node of the first source/emitter follower transistor and the filter is also coupled to the output node of the first source/emitter follower transistor. The bias circuit stage includes one or more replica transistors that replicate transistors of the power amplifier or power amplifier core stage, an envelope detector replica transistor and a replica of the current source of the envelope detector circuit.

    Abstract translation: 具有嵌入包络检测的功率放大器偏置电路包括耦合到包络检测器电路的偏置电路级，以根据输入包络信号增加提供给功率放大器的偏置。 包络检测器电路包括第一源极/射极跟随器晶体管，电流源和用于生成基带包络信号的滤波器。 电流源耦合到第一源极/射极跟随器晶体管的输出节点，并且滤波器也耦合到第一源极/射极跟随器晶体管的输出节点。 偏置电路级包括复制功率放大器或功率放大器核心级的晶体管的一个或多个复制晶体管，包络检测器复制晶体管和包络检测器电路的电流源的复制品。

    ON-CHIP NETWORK ANALYZER
    7.
    发明申请
    ON-CHIP NETWORK ANALYZER 审中-公开

    公开(公告)号：WO2023048865A1

    公开(公告)日：2023-03-30

    申请号：PCT/US2022/041052

    申请日：2022-08-22

    Applicant: QUALCOMM INCORPORATED

    Inventor： GOLDBLATT, Jeremy ,  MISHRA, Chinmaya

    IPC: H04B1/04

    Abstract: An integrated circuit operable to measure an impedance presented to a transmitter path of the integrated circuit and a method thereof are provided. The integrated circuit includes a directional coupler that has an input port, a through port, a coupled port, and an isolation port. The integrated circuit also includes a power amplifier coupled to the input port of the directional coupler, a power detector configured to measure output levels from the coupled port and the isolation port of the directional coupler, a reference signal generator coupled to the isolation port of the directional coupler, and a vector modulator configured to adjust a phase of a signal generated from the power amplifier.

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