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    BACKSIDE DRILL EMBEDDED DIE SUBSTRATE
    1.
    发明申请
    BACKSIDE DRILL EMBEDDED DIE SUBSTRATE 审中-公开
    背侧钻嵌入式模具基板

    公开(公告)号：WO2017161199A1

    公开(公告)日：2017-09-21

    申请号：PCT/US2017/022829

    申请日：2017-03-16

    Applicant: QUALCOMM INCORPORATED

    Inventor： KIM, Daeik ,  FU, Jie ,  YUN, Changhan ,  KIM, Chin-Kwan ,  ALDRETE, Manuel ,  ZUO, Chengjie ,  VELEZ, Mario ,  KIM, Jonghae

    IPC: H01L23/538 ,  H01L23/48 ,  H01L21/768 ,  H01L23/498 ,  H01L21/48

    Abstract: A device and method of fabricating are provided. The device includes a substrate having a first side and an opposite second side, a cavity defined within the substrate from the first side, a die coupled to a floor of the cavity and having a conductive pad on a side of the die distal to the floor of the cavity. A laminate layer coupled to the second side of the substrate may be included. A hole may be drilled, at one time, through layers of the device, through the die, and through the conductive pad. The hole extends through and is defined within the laminate layer (if present), the second side of the substrate, the die, and the conductive pad. A conductive material is provided within the hole and extends between and through the laminate layer (if provided), the second side of the substrate, the die, and the conductive pad.

    Abstract translation: 提供了一种装置和制造方法。 该装置包括具有第一侧和相对的第二侧的基板，限定在基板内从第一侧开始的空腔，耦合到空腔的底板并且在远离地板的管芯侧上具有导电垫的管芯 的空腔。 可以包括耦合到衬底的第二侧的层压层。 一次可以钻出一个孔，穿过器件的各层，穿过模具，并穿过导电垫。 该孔延伸穿过并被限定在层压层（如果存在）内，衬底的第二侧，管芯和导电垫内。 导电材料设置在孔内并且在层压层（如果提供的话），衬底的第二侧，管芯和导电垫之间并穿过层压层延伸。

    DIPLEXER DESIGN USING THROUGH GLASS VIA TECHNOLOGY
    4.
    发明申请
    DIPLEXER DESIGN USING THROUGH GLASS VIA TECHNOLOGY 审中-公开
    通过玻璃技术使用玻璃的双层玻璃设计

    公开(公告)号：WO2014110480A3

    公开(公告)日：2014-07-17

    申请号：PCT/US2014/011223

    申请日：2014-01-13

    Applicant: QUALCOMM INCORPORATED

    Inventor： ZUO, Chengjie ,  KIM, Jonghae ,  VELEZ, Mario Francisco ,  LAN, Je-Hsiung ,  KIM, Daeik ,  YUN, Changhan ,  BERDY, David F ,  MIKULKA, Robert P. ,  NORWAK, Matthew M. ,  ZHANG, Xiangdong ,  SEE, Puay H

    IPC: H03H7/46 ,  H01F17/00 ,  H01L23/15 ,  H01L23/498 ,  H01L23/64 ,  H05K1/16 ,  H03H1/00

    Abstract: A diplexer (200, 240) includes a substrate (242) having a set of through substrate vias. The diplexer also includes a first set of traces (206, 226, 228) on a first surface of the substrate. The first traces are coupled to the through substrate vias (224). The diplexer further includes a second set of traces (228) on a second surface of the substrate that is opposite the first surface. The second traces are coupled to opposite ends of the set of through substrate vias. The through substrate vias and the traces also operate as a 3D inductor. The diplexer also includes a capacitor (210, 212, 214, 230) supported by the substrate.

    Abstract translation: 双工器（200,240）包括具有一组穿衬底通孔的衬底（242）。 双工器还包括在衬底的第一表面上的第一组迹线（206,226,228）。 第一迹线耦合到穿衬底通孔（224）。 双工器还包括在与第一表面相对的衬底的第二表面上的第二组迹线（228）。 第二迹线耦合到该组衬底通孔的相对端。 衬底通孔和迹线也可以作为3D电感器工作。 双工器还包括由衬底支撑的电容器（210,212,214,230）。

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