-
公开(公告)号:JPH09172337A
公开(公告)日:1997-06-30
申请号:JP15105096
申请日:1996-06-12
Applicant: SGS THOMSON MICROELECTRONICS , CONS RIC MICROELETTRONICA
Inventor: BRUCCOLERI MELCHIORRE , DEMICHELI DAVIDE , DEMICHELI MARCO , PATTI GIUSEPPE
Abstract: PROBLEM TO BE SOLVED: To provide a circuit automatically adjusting the gain of a diffenteial amplifier which is satisfactory operated even when ununiform signal is amplified. SOLUTION: The circuit is provided with a duplex half wave rectifier(DHWR) connected tot he output of the differential voltage gain amplifier(VGA) generating two quantities depending on the amplitude of the half wave of the output signal of the amplifier(VGA), two compactors (COMP1 and COMP2) respectively provided with reference inputs (IN-1 and IN-2) for generating the output signal of each when inputs (IN+1 and IN+2) connected to the output (OUT1 and OUT2) of this rectifier (DHWR) and the amplitudes of the respective half eaves become larger than a level impressed to reference inputs (IN-1 and IN-2), and processing means (str1, A1, R1, Str2, A2, R2 and C) generating signals for the gain adjustment of the amplifier depending on the duration time of the output signal of the two compactors.
-
公开(公告)号:JPH1069741A
公开(公告)日:1998-03-10
申请号:JP16391797
申请日:1997-06-20
Applicant: SGS THOMSON MICROELECTRONICS
Inventor: BRUCCOLERI MERLCHIORRE , DEMICHELI MARCO , DEMICHELI DAVIDE , PATTI GIUSEPPE
Abstract: PROBLEM TO BE SOLVED: To obtain a servo demodulator having high immunity against noises by temporarily holding the amplitude in detecting each peak amplitude, successively detecting a plurality of signal peaks and discharging a first capacitor whenever the weighted average is held with a second capacity. SOLUTION: A signal existing between input terminals IN+, IN- is applied to a differential comparator 6 and a peak detector 5. The signal CP is made valid when the comparator 6 is higher than a first prescribed value and the signal CN is made valid when the same is lower than a second prescribed value. The output 15 of a differential amplifier 11 is fed to switches 14, 8, and each switch is closed with the command generated with a control logic 7. The logic 7 is started with a SAMPLE signal, a reset pulse DISC is generated during the period when the signal CP is valid, a signal AVE is made to be valid when the signal CP becomes valid first, thereafter the signal AVE is made to be valid whenever the signal CN becomes valid after the signal CP became valid twice.
-
公开(公告)号:JPH08272886A
公开(公告)日:1996-10-18
申请号:JP35271495
申请日:1995-12-27
Applicant: SGS THOMSON MICROELECTRONICS , CONS RIC MICROELETTRONICA
Inventor: BRUCCOLERI MELCHIORRE , COSENTINO GAETANO , DEMICHELI MARCO , PORTALURI SALVATORE
Abstract: PROBLEM TO BE SOLVED: To compensate for an output signal error which is caused by an analog multiplier having at least one differential output column. SOLUTION: An output signal error is compensated for by flowing base current replica of a bipolar transistor to a precompensation column transistor which drives emitter-coupled bipolar transistors (Q3 and Q4) that constitute a differential column of an analog multiplier.
-
公开(公告)号:DE69313624T2
公开(公告)日:1998-04-02
申请号:DE69313624
申请日:1993-06-30
Applicant: SGS THOMSON MICROELECTRONICS
Inventor: DEMICHELI MARCO
Abstract: A temperature-stable variable gain amplifier comprising a differential input stage (Q1,Q2) coupled to a first terminal (+Vc) of a voltage supply generator and to a second terminal (GND) of the voltage supply generator through first (M1) and second (M2) field-effect transistors whose gate terminals are connected into a first common control terminal (VG1). Connected to the differential stage are two bipolar transistors (Q3,Q4) which are also connected between the first terminal (+Vc), through two resistors (R3,R4), and the second (GND) of the voltage supply generator, through third (M3) and fourth (M4) field-effect transistors. The third and fourth transistors have gate terminals connected into a second common control terminal (VG2). The collector terminals of the bipolar transistors form output terminals (OUT+,OUT-) for the amplifier.
-
公开(公告)号:DE69313624D1
公开(公告)日:1997-10-09
申请号:DE69313624
申请日:1993-06-30
Applicant: SGS THOMSON MICROELECTRONICS
Inventor: DEMICHELI MARCO
Abstract: A temperature-stable variable gain amplifier comprising a differential input stage (Q1,Q2) coupled to a first terminal (+Vc) of a voltage supply generator and to a second terminal (GND) of the voltage supply generator through first (M1) and second (M2) field-effect transistors whose gate terminals are connected into a first common control terminal (VG1). Connected to the differential stage are two bipolar transistors (Q3,Q4) which are also connected between the first terminal (+Vc), through two resistors (R3,R4), and the second (GND) of the voltage supply generator, through third (M3) and fourth (M4) field-effect transistors. The third and fourth transistors have gate terminals connected into a second common control terminal (VG2). The collector terminals of the bipolar transistors form output terminals (OUT+,OUT-) for the amplifier.
-
-
-
-