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公开(公告)号：JPH09172337A
公开(公告)日：1997-06-30
申请号：JP15105096
申请日：1996-06-12
Applicant: SGS THOMSON MICROELECTRONICS , CONS RIC MICROELETTRONICA
Inventor： BRUCCOLERI MELCHIORRE , DEMICHELI DAVIDE , DEMICHELI MARCO , PATTI GIUSEPPE
Abstract: PROBLEM TO BE SOLVED: To provide a circuit automatically adjusting the gain of a diffenteial amplifier which is satisfactory operated even when ununiform signal is amplified. SOLUTION: The circuit is provided with a duplex half wave rectifier(DHWR) connected tot he output of the differential voltage gain amplifier(VGA) generating two quantities depending on the amplitude of the half wave of the output signal of the amplifier(VGA), two compactors (COMP1 and COMP2) respectively provided with reference inputs (IN-1 and IN-2) for generating the output signal of each when inputs (IN+1 and IN+2) connected to the output (OUT1 and OUT2) of this rectifier (DHWR) and the amplitudes of the respective half eaves become larger than a level impressed to reference inputs (IN-1 and IN-2), and processing means (str1, A1, R1, Str2, A2, R2 and C) generating signals for the gain adjustment of the amplifier depending on the duration time of the output signal of the two compactors.
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公开(公告)号：JPH08272886A
公开(公告)日：1996-10-18
申请号：JP35271495
申请日：1995-12-27
Applicant: SGS THOMSON MICROELECTRONICS , CONS RIC MICROELETTRONICA
Inventor： BRUCCOLERI MELCHIORRE , COSENTINO GAETANO , DEMICHELI MARCO , PORTALURI SALVATORE
Abstract: PROBLEM TO BE SOLVED: To compensate for an output signal error which is caused by an analog multiplier having at least one differential output column. SOLUTION: An output signal error is compensated for by flowing base current replica of a bipolar transistor to a precompensation column transistor which drives emitter-coupled bipolar transistors (Q3 and Q4) that constitute a differential column of an analog multiplier.
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公开(公告)号：DE69426776T2
公开(公告)日：2001-06-13
申请号：DE69426776
申请日：1994-12-27
Applicant: ST MICROELECTRONICS SRL , CONS RIC MICROELETTRONICA
Inventor： BRUCCOLERI MELCHIORRE , COSENTINO GAETANO , DEMICHELI MARCO , PORTALURI SALVATORE
Abstract: The error on the output signal produced by an analog multiplier comprising at least a differential output stage formed by a pair of emitter-coupled bipolar transistors (Q3, Q4), each driven by a predistortion stage (Q1, Q2) having a reciprocal of a hyperbolic tangent transfer function, attributable to the base currents of the bipolar transistors used, is compensated by generating replicas of the base current of the bipolar transistors (Q3, Q4) of said differential stage and forcing said replica currents on the output node of the respective predistortion stage (Q1, Q2). Various embodiments of different dissipative behaviours are described.
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公开(公告)号：DE69426776D1
公开(公告)日：2001-04-05
申请号：DE69426776
申请日：1994-12-27
Applicant: ST MICROELECTRONICS SRL , CONS RIC MICROELETTRONICA
Inventor： BRUCCOLERI MELCHIORRE , COSENTINO GAETANO , DEMICHELI MARCO , PORTALURI SALVATORE
Abstract: The error on the output signal produced by an analog multiplier comprising at least a differential output stage formed by a pair of emitter-coupled bipolar transistors (Q3, Q4), each driven by a predistortion stage (Q1, Q2) having a reciprocal of a hyperbolic tangent transfer function, attributable to the base currents of the bipolar transistors used, is compensated by generating replicas of the base current of the bipolar transistors (Q3, Q4) of said differential stage and forcing said replica currents on the output node of the respective predistortion stage (Q1, Q2). Various embodiments of different dissipative behaviours are described.
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公开(公告)号：DE69515869T2
公开(公告)日：2000-12-07
申请号：DE69515869
申请日：1995-09-14
Applicant: ST MICROELECTRONICS SRL , CONS RIC MICROELETTRONICA
Inventor： BRUCCOLERI MELCHIORRE , DEMICHELI DAVIDE , DEMICHELI MARCO , PATTI GIUSEPPE
Abstract: The circuit described comprises a double half-wave rectifier (DHWR) connected to the outputs of the differential amplifier (VGA) in order to produce two quantities dependent on the amplitudes of the half-waves of the output signal of the amplifier (VGA), two comparators (COMP1, COMP2) each having an input (IN+1, IN+2) connected to an output (OUT1, OUT2) of the rectifier (DHWR) and a reference input (IN-1, IN-2) in order to produce respective output signals when the amplitudes of the respective half-waves are greater than the levels applied to the reference inputs (IN-1, IN-2), and processing means (Str1, A1, R1, Str2, A2, R2, C) for generating a signal for regulating the gain of the amplifier in dependence on the durations of the output signals of the two comparators. The circuit may advantageously be used when the signal to be amplified (v+, v-) is not symmetrical.
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Patent Agency Ranking
公开(公告)号：DE69515869D1
公开(公告)日：2000-04-27
申请号：DE69515869
申请日：1995-09-14
Applicant: ST MICROELECTRONICS SRL , CONS RIC MICROELETTRONICA
Inventor： BRUCCOLERI MELCHIORRE , DEMICHELI DAVIDE , DEMICHELI MARCO , PATTI GIUSEPPE
Abstract: The circuit described comprises a double half-wave rectifier (DHWR) connected to the outputs of the differential amplifier (VGA) in order to produce two quantities dependent on the amplitudes of the half-waves of the output signal of the amplifier (VGA), two comparators (COMP1, COMP2) each having an input (IN+1, IN+2) connected to an output (OUT1, OUT2) of the rectifier (DHWR) and a reference input (IN-1, IN-2) in order to produce respective output signals when the amplitudes of the respective half-waves are greater than the levels applied to the reference inputs (IN-1, IN-2), and processing means (Str1, A1, R1, Str2, A2, R2, C) for generating a signal for regulating the gain of the amplifier in dependence on the durations of the output signals of the two comparators. The circuit may advantageously be used when the signal to be amplified (v+, v-) is not symmetrical.
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公开(公告)号：DE69528967D1
公开(公告)日：2003-01-09
申请号：DE69528967
申请日：1995-05-31
Applicant: ST MICROELECTRONICS SRL , CONS RIC MICROELETTRONICA
Inventor： BRUCCOLTRI MELCHIORRE , COSENTINO GAETANO , DEMICHELI MARCO , PATTI GIUSEPPE
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公开(公告)号：DE69614501T2
公开(公告)日：2002-04-11
申请号：DE69614501
申请日：1996-03-08
Applicant: ST MICROELECTRONICS SRL , CONS RIC MICROELETTRONICA
Inventor： BRUCCOLERI MELCHIORRE , COSENTINO GAETANO , DEMICHELI MARCO , PISATI VALERIO
Abstract: The system described comprises various circuit units (10, 11, 12) each having a capacitor (C0, C1, C2) and charging means (G0, G1, G2) for defining a quantity depending upon the ratio (I/C) between the charging current and the capacitance of the capacitors. In order to compensate automatically for deviations of the actual capacitances from the nominal capacitances due to fluctuations in the parameters of the integrated-circuit manufacturing process, the system has a phase-locked loop (PLL) which uses one (10) of the circuit units as an adjustable oscillator, and current transducer means (17) which regulate the charging currents of the capacitors (C1, C2) of the circuit units (11, 12) in dependence on the regulated charging current of the capacitor (C0) of the oscillator (10) or the error current of the PLL loop.
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公开(公告)号：DE69614501D1
公开(公告)日：2001-09-20
申请号：DE69614501
申请日：1996-03-08
Applicant: ST MICROELECTRONICS SRL , CONS RIC MICROELETTRONICA
Inventor： BRUCCOLERI MELCHIORRE , COSENTINO GAETANO , DEMICHELI MARCO , PISATI VALERIO
Abstract: The system described comprises various circuit units (10, 11, 12) each having a capacitor (C0, C1, C2) and charging means (G0, G1, G2) for defining a quantity depending upon the ratio (I/C) between the charging current and the capacitance of the capacitors. In order to compensate automatically for deviations of the actual capacitances from the nominal capacitances due to fluctuations in the parameters of the integrated-circuit manufacturing process, the system has a phase-locked loop (PLL) which uses one (10) of the circuit units as an adjustable oscillator, and current transducer means (17) which regulate the charging currents of the capacitors (C1, C2) of the circuit units (11, 12) in dependence on the regulated charging current of the capacitor (C0) of the oscillator (10) or the error current of the PLL loop.
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公开(公告)号：JPH1069741A
公开(公告)日：1998-03-10
申请号：JP16391797
申请日：1997-06-20
Applicant: SGS THOMSON MICROELECTRONICS
Inventor： BRUCCOLERI MERLCHIORRE , DEMICHELI MARCO , DEMICHELI DAVIDE , PATTI GIUSEPPE
Abstract: PROBLEM TO BE SOLVED: To obtain a servo demodulator having high immunity against noises by temporarily holding the amplitude in detecting each peak amplitude, successively detecting a plurality of signal peaks and discharging a first capacitor whenever the weighted average is held with a second capacity. SOLUTION: A signal existing between input terminals IN+, IN- is applied to a differential comparator 6 and a peak detector 5. The signal CP is made valid when the comparator 6 is higher than a first prescribed value and the signal CN is made valid when the same is lower than a second prescribed value. The output 15 of a differential amplifier 11 is fed to switches 14, 8, and each switch is closed with the command generated with a control logic 7. The logic 7 is started with a SAMPLE signal, a reset pulse DISC is generated during the period when the signal CP is valid, a signal AVE is made to be valid when the signal CP becomes valid first, thereafter the signal AVE is made to be valid whenever the signal CN becomes valid after the signal CP became valid twice.
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