公开(公告)号：DE69029942D1

公开(公告)日：1997-03-27

申请号：DE69029942

申请日：1990-10-16

Applicant: SGS THOMSON MICROELECTRONICS ,  CONS RIC MICROELETTRONICA

Inventor： ZAMBRANO RAFFAELE ,  MAGRO CARMELO

IPC: H01L21/336 ,  H01L29/10 ,  H01L29/78 ,  H01L29/772

Abstract: The process provides first for the accomplishment of low-doping body regions (12) at the sides and under a gate region (15) and then the accomplishment of high-doping body regions (14) inside said low-doping body regions (12) and self-aligned with said gate region (15). There is thus obtained an MOS power transistor with vertical current flow which has high-doping body regions (14) self-aligned with said gate region (15) and with a reduced junction depth.

公开(公告)号：DE69029942T2

公开(公告)日：1997-08-28

申请号：DE69029942

申请日：1990-10-16

Applicant: SGS THOMSON MICROELECTRONICS ,  CONS RIC MICROELETTRONICA

Inventor： ZAMBRANO RAFFAELE ,  MAGRO CARMELO

IPC: H01L21/336 ,  H01L29/10 ,  H01L29/78 ,  H01L29/772

Abstract: The process provides first for the accomplishment of low-doping body regions (12) at the sides and under a gate region (15) and then the accomplishment of high-doping body regions (14) inside said low-doping body regions (12) and self-aligned with said gate region (15). There is thus obtained an MOS power transistor with vertical current flow which has high-doping body regions (14) self-aligned with said gate region (15) and with a reduced junction depth.

公开(公告)号：IT8922891D0

公开(公告)日：1989-12-29

申请号：IT2289189

申请日：1989-12-29

Applicant: SGS THOMSON MICROELECTRONICS

Inventor： FERLA GIUSEPPE ,  MAGRO CARMELO ,  LANZA PAOLO

IPC: H01L21/28 ,  H01L21/336 ,  H01L29/45 ,  H01L29/49 ,  H01L29/78 ,  H01L

Abstract: Process for the manufacture of power-MOS semiconductor devices which achieve high cell density by the use of self-aligning techniques and photographic exposure equipment of the stepper type. The process calls for definition and formation of the source by a complementary spacer technique and metallization of the source and gate contact areas by silicides after formation of spacers on the gate wall (FIG. 11).

公开(公告)号：IT8921281D0

公开(公告)日：1989-07-24

申请号：IT2128189

申请日：1989-07-24

Applicant: SGS THOMSON MICROELECTRONICS

Inventor： FERLA GIUSEPPE ,  LANZA PAOLO ,  MAGRO CARMELO

IPC: H01L29/78 ,  H01L21/033 ,  H01L21/265 ,  H01L21/32 ,  H01L21/336

Abstract: Along the outline of a first doped region of a first mask is formed using the spacer technology, said mask being made up of a dielectric opposing to the oxygen diffusion. Another mask is created within this first mask, using a process of selective thermal oxidation. The second mask is used to implant dopant into a second region which will only be defined along the outlines of the first region.

公开(公告)号：DE69007449T2

公开(公告)日：1994-08-25

申请号：DE69007449

申请日：1990-12-24

Applicant: SGS THOMSON MICROELECTRONICS

Inventor： FERLA GIUSEPPE ,  MAGRO CARMELO ,  LANZA PAOLO

IPC: H01L21/28 ,  H01L21/336 ,  H01L29/45 ,  H01L29/49 ,  H01L29/78 ,  H01L29/784

Abstract: Process for the manufacture of power-MOS semiconductor devices which achieve high cell density by the use of self-aligning techniques and photographic exposure equipment of the stepper type. The process calls for definition and formation of the source by a complementary spacer technique and metallization of the source and gate contact areas by silicides after formation of spacers on the gate wall (FIG. 11).

公开(公告)号：DE69007449D1

公开(公告)日：1994-04-21

申请号：DE69007449

申请日：1990-12-24

Applicant: SGS THOMSON MICROELECTRONICS

Inventor： FERLA GIUSEPPE ,  MAGRO CARMELO ,  LANZA PAOLO

IPC: H01L21/28 ,  H01L21/336 ,  H01L29/45 ,  H01L29/49 ,  H01L29/78 ,  H01L29/784

Abstract: Process for the manufacture of power-MOS semiconductor devices which achieve high cell density by the use of self-aligning techniques and photographic exposure equipment of the stepper type. The process calls for definition and formation of the source by a complementary spacer technique and metallization of the source and gate contact areas by silicides after formation of spacers on the gate wall (FIG. 11).

公开(公告)号：IT1231300B

公开(公告)日：1991-11-28

申请号：IT2128189

申请日：1989-07-24

Applicant: SGS THOMSON MICROELECTRONICS

Inventor： FERLA GIUSEPPE ,  LANZA PAOLO ,  MAGRO CARMELO

IPC: H01L29/78 ,  H01L21/033 ,  H01L21/265 ,  H01L21/32 ,  H01L21/336 ,  H01L

Abstract: Along the outline of a first doped region of a first mask is formed using the spacer technology, said mask being made up of a dielectric opposing to the oxygen diffusion. Another mask is created within this first mask, using a process of selective thermal oxidation. The second mask is used to implant dopant into a second region which will only be defined along the outlines of the first region.