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公开(公告)号:DE602006006990D1
公开(公告)日:2009-07-09
申请号:DE602006006990
申请日:2006-06-28
Applicant: ST MICROELECTRONICS NV , ST MICROELECTRONICS SRL
Inventor: PAPPALARDO FRANCESCO , NOTARANGELO GIUSEPPE , SALURSO ELENA , GUIDETTI ELIO
IPC: G06F9/38
Abstract: A processor architecture (10) e.g. for multimedia applications, includes a plurality of processor clusters (18a, 18b) that provide a vectorial data processing capability. The processing elements in the processor clusters (18a, 18b) are configured to process both data with a given bit length N and data with bit lengths N/2, N/4, and so on according to a Single Instruction Multiple Data (SIMD) paradigm. A load unit (26) is provided for loading into the processor clusters (18a, 18b) data to be processed in the form of sets of more significant bits and less significant bits of operands to be processed according to a same instruction. An intercluster datapath (28) exchanges and/or merges data between the processor clusters (18a, 18b). The intercluster datapath (28) is scalable to activate selected ones of the processor clusters (18a, 18b), whereby the architecture (10) is adapted to operate simultaneously on SIMD, scalar and vectorial data. Preferably, the instruction subsystem (12) has instruction parallelism capability and the intercluster datapath (28) is configured for performing operations on e.g. 2*N data. Preferably, a data cache memory (34) is provided which is accessible either in a scalar mode or in a vectorial mode.
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公开(公告)号:DE602006016256D1
公开(公告)日:2010-09-30
申请号:DE602006016256
申请日:2006-06-28
Applicant: ST MICROELECTRONICS NV , ST MICROELECTRONICS SRL
Inventor: PAPPALARDO FRANCESCO , NOTARANGELO GIUSEPPE , SALURSO ELENA , GUIDETTI ELIO
IPC: G06F12/08 , G06F12/084 , G06F12/0886
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公开(公告)号:DE60233056D1
公开(公告)日:2009-09-03
申请号:DE60233056
申请日:2002-10-11
Applicant: ST MICROELECTRONICS SRL
Inventor: PAPPALARDO FRANCESCO , AVELLONE GIUSEPPE , SALURSO ELENA , GALLUZZO AGOSTINO
IPC: H04B1/707
Abstract: To obtain frame synchronization and identify the cell codegroup in a cellular communication system (such as a system based upon the standard 3GPP FDD), there are available the synchronization codes (SSCH) organized in chips or letters transmitted at the beginning of respective slots. Slot synchronization is obtained previously in a first step of the operation of cell search. During a second step, there are acquired, by means of correlation (10) or fast Hadamard transform, the energy values corresponding to the respective individual letters with reference to the possible starting positions of the corresponding frame within the respective slot. Operating in a serial way (24) at the end of acquisition of the aforesaid energy values of the individual letters, or else operating in parallel, the energies of the corresponding words are determined. Of these eneriges only the maximum word-energy value and the information for the corresponding starting position are stored in a memory structure (22). Said maximum value and said starting position identify, respectively, the cell codes and the frame synchronization sought. A preferential application is in mobile communication systems based upon standards such as UMTS, CDMA2000, IS95, or WBCDMA.
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公开(公告)号:ITTO20130994A1
公开(公告)日:2015-06-06
申请号:ITTO20130994
申请日:2013-12-05
Applicant: ST MICROELECTRONICS SRL
Inventor: DEAMBROGGI FABIO GIUSEPPE , DICOLA EUSEBIO , RONCHI MARCO , SALURSO ELENA , TICLI LUCIO SALVATORE
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公开(公告)号:ITTO20040415A1
公开(公告)日:2004-09-22
申请号:ITTO20040415
申请日:2004-06-22
Applicant: ST MICROELECTRONICS SRL
Inventor: NOTARANGELO GIUSEPPE , PAPPALARDO FRANCESCO , SALURSO ELENA
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公开(公告)号:IT201600111351A1
公开(公告)日:2018-05-04
申请号:IT201600111351
申请日:2016-11-04
Applicant: ST MICROELECTRONICS DES & APPL , ST MICROELECTRONICS SRL
Inventor: DICOLA EUSEBIO , SALURSO ELENA , MILSIMER JAN
IPC: H04L27/156
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公开(公告)号:DE60331728D1
公开(公告)日:2010-04-29
申请号:DE60331728
申请日:2003-07-15
Applicant: ST MICROELECTRONICS SA , ST MICROELECTRONICS SRL
Inventor: MESSINA ETTORE , PIAZZESE NICOLO IVAN , LIPPOLIS GIUSEPPE , SALURSO ELENA , SERRATORE ALBERTO , GALLUZZO AGOSTINO
Abstract: A method for automatic gain control, e.g. in a receiver for a mobile telecommunication system comprises the operations of: mixing (13) a received signal (Sin) with an error signal (Perr, Pf); performing an analog-to-digital conversion (14) on the result of said mixing operation, in order to obtain a controlled output signal (x(t), Sout); measuring (25) the power (Pmeas) of said controlled output signal (x(t), Sout); subtracting the measured power (Pmeas) from a reference power (Pref) in order to obtain said error signal (Perr, Pf). According to the proposed method the operation of measuring the power of the controlled output signal (x(t), Sout) comprises: setting at least a power threshold (Th;Th1, Th2, Th3); measuring (27) a rate of crossings of said power threshold (Th; Th1, Th2, Th3) by said controlled output signal (x(t), Sout) in a given observation window; deriving (29) from said number of crossings the measured power value (Pmeas, sigma 2=1). The proposed method is particularly suitable for application in receivers of mobile telecommunication systems based on CDMA (Code Division Multiple Access), but also for mobile telecommunication system according to GSM, UMTS, CDMA2000, IS95 o WBCDMA standards and satellite telecommunication systems.
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