公开(公告)号：FR2853452B1

公开(公告)日：2005-08-19

申请号：FR0304008

申请日：2003-04-01

Applicant: ST MICROELECTRONICS SA

Inventor： COSNIER VINCENT ,  MORAND YVES ,  KERMARREC OLIVIER ,  BENSAHEL DANIEL ,  CAMPIDELLI YVES

IPC: H01L21/28 ,  H01L29/49 ,  H01L29/51

Abstract: The fabrication of a semiconductor device having a dielectric grid of a material with a high dielectric permittivity includes a stage (40) of deposition, directly on the grid dielectric, of a first layer of Si1-xGex with 0.5 less than x = 1, at a temperature essentially low with respect to the temperature of deposition of poly-Si by thermal chemical vapour deposition. An independent claim is also claimed for the semiconductor device thus fabricated.

公开(公告)号：FR2853451B1

公开(公告)日：2005-08-05

申请号：FR0304152

申请日：2003-04-03

Applicant: ST MICROELECTRONICS SA

Inventor： BENSAHEL DANIEL ,  KERMARREC OLIVIER ,  MORAND YVES ,  CAMPIDELLI YVES ,  COSNIER VINCENT

IPC: C30B25/18 ,  H01L21/20

公开(公告)号：FR2853451A1

公开(公告)日：2004-10-08

申请号：FR0304152

申请日：2003-04-03

Applicant: ST MICROELECTRONICS SA

Inventor： BENSAHEL DANIEL ,  KERMARREC OLIVIER ,  MORAND YVES ,  CAMPIDELLI YVES ,  COSNIER VINCENT

IPC: C30B25/18 ,  H01L21/20

Abstract: The epitaxial formation of a hetero-atomic monocrystalline semiconductor layer (21) on a monocrystalline semiconductor slice (20), the crystalline networks of the layer and the slice being different, incorporates a stage of forming, before epitaxy, in the surface of the slice, at least one annulus of discontinuities around a useful region. An independent claim is also included for a monocrystalline semiconductor slice covered by a hetero-atomic monocrystalline semiconductor layer.

公开(公告)号：FR2853452A1

公开(公告)日：2004-10-08

申请号：FR0304008

申请日：2003-04-01

Applicant: ST MICROELECTRONICS SA

Inventor： COSNIER VINCENT ,  MORAND YVES ,  KERMARREC OLIVIER ,  BENSAHEL DANIEL ,  CAMPIDELLI YVES

IPC: H01L21/28 ,  H01L29/49 ,  H01L29/51

Abstract: The fabrication of a semiconductor device having a dielectric grid of a material with a high dielectric permittivity includes a stage (40) of deposition, directly on the grid dielectric, of a first layer of Si1-xGex with 0.5 less than x = 1, at a temperature essentially low with respect to the temperature of deposition of poly-Si by thermal chemical vapour deposition. An independent claim is also claimed for the semiconductor device thus fabricated.