LIMITER CIRCUIT
    2.
    发明专利

    公开(公告)号:JPH07212156A

    公开(公告)日:1995-08-11

    申请号:JP23539794

    申请日:1994-09-29

    Abstract: PURPOSE: To decrease a voltage across an equalization capacitor, to accelerate a charging process, and to make a current limiting action proper by providing an uni-directional current energizing circuit between one terminal the equalization capacitor and the gate of a power MOS transistor. CONSTITUTION: When a voltage across a resistor Rs is increased, and allowed to reach the voltage of a reference power source Vr, a transistor TRQ5 is turned off. Then, a TrQ4 turns on a TrQ6 to draw more current from the base of the TrQ6. Some portion of current Ig is thus allowed to flow to the emitter of the TrQ6, the gate voltage of a power MOSTrMp is decreased, and load current I is decreased. At this time, a equalization capacitor C is not sufficiently charged, and the TrQ4 draws current from the base of the TrQ6, and the gate of the TrMp continues to draw current from a current source Ig while the TrQ6 is turned off, and increases the load current I. When an unidirectional current energizing circuit 2 is arranged at a prescribed position, the equalization capacitor C can be charged at a higher rate. Also, an amplifier 1 is properly interposed, and the current I is limited at an output terminal F.

    3.
    发明专利
    未知

    公开(公告)号:DE69322866D1

    公开(公告)日:1999-02-11

    申请号:DE69322866

    申请日:1993-09-30

    Abstract: The invention concerns a circuit for limiting the maximum current to be supplied to a load (Z) through a power Mos (Mp), being in particular of the regulated type using an equalizing capacitor (C). The addition of circuit means (2) with a one-way current flow between a terminal of said equalizing capacitor (C) and the gate terminal of (Mp) is effective to lower the voltage across the capacitor (C) and to speed up its charging process, thereby making the current limiting action expected from the circuit a timely one. The circuit means (2) may include a second Mos (M) of the same type as the power Mos (Mp). In this way, any deviations of (Mp) from its designed operation, as due to its manufacturing process and thermal drift phenomena, can be also compensated.

    4.
    发明专利
    未知

    公开(公告)号:DE69533696D1

    公开(公告)日:2004-12-02

    申请号:DE69533696

    申请日:1995-08-31

    Abstract: A current generator circuit with controllable frequency response is of a type which comprises at least one current mirror formed of MOS transistors, being powered through a terminal held at a constant voltage, having an input leg through which a reference current (I1) is driven by a first current generator (G1), and having an output leg for generating, on an output terminal (OUT) of the mirror, a mirrored current (Iout) which is proportional to the reference current (I1). The input leg includes at least a first transistor (M1) which is diode-connected and has a control terminal (Ga1) coupled to a corresponding terminal (Ga2) of a second transistor (M2) included in the output leg. In accordance with the invention, the mirror circuit further comprises an impedance matching means (3) connected across the control terminals (Ga1 and Ga2) of the first and second transistors and configured to hold the same voltage value at both terminals (Ga1 and Ga2). The impedance matching means (3) has an adjustable output impedance, specifically lower in value than the value to be had without this means. It functions to regulate the impedance on the control node (Ga2) of the second transistor (M2). The invention is equally applicable to N-channel and P-channel MOS transistors. Advantageously, the reference current can be varied by an external signal which is a function of the output signal, to provide feedback regulating features.

    5.
    发明专利
    未知

    公开(公告)号:DE69629278D1

    公开(公告)日:2003-09-04

    申请号:DE69629278

    申请日:1996-04-30

    Abstract: A circuit (1) for the controlled recycle without oscillation of the discharge current from an inductive load (L) comprises: an active element (T) connected, in series with the inductive load (L), between first and second power supply terminals (Va and Vb), and having a control terminal (DR) to which a driver circuit (C) is connected, and a recycling regulating means (2) connected to a connection node (D) between the active element (T) and the inductive load (L), and sensitive to a voltage threshold (Vmax) at said connection node (D) to generate, depending on attainment of that threshold (Vmax), a power-on signal for application to the control terminal (DR) effective to start up recycling of the discharge current through the active element (T). According to the present invention, the circuit (1) further comprises a control circuit (3) for controlling the voltage oscillation at the connection node (D) at the end of the recycling, which control circuit includes a circuit means (ZR) with a relatively low resistive impedance and being selectively connectable, at least upon the active element (T) being turned off at the end of the recycling, between the connection node (D) between the active element (T) and the inductive load (L) and a node (A) having a substantially zero impedance toward at least one of said first and second power supply terminals (Va and Vb).

    6.
    发明专利
    未知

    公开(公告)号:DE69322866T2

    公开(公告)日:1999-05-20

    申请号:DE69322866

    申请日:1993-09-30

    Abstract: The invention concerns a circuit for limiting the maximum current to be supplied to a load (Z) through a power Mos (Mp), being in particular of the regulated type using an equalizing capacitor (C). The addition of circuit means (2) with a one-way current flow between a terminal of said equalizing capacitor (C) and the gate terminal of (Mp) is effective to lower the voltage across the capacitor (C) and to speed up its charging process, thereby making the current limiting action expected from the circuit a timely one. The circuit means (2) may include a second Mos (M) of the same type as the power Mos (Mp). In this way, any deviations of (Mp) from its designed operation, as due to its manufacturing process and thermal drift phenomena, can be also compensated.

    8.
    发明专利
    未知

    公开(公告)号:DE69322853T2

    公开(公告)日:1999-05-27

    申请号:DE69322853

    申请日:1993-04-30

    Abstract: A circuit for recycling the discharge current of an inductive load being driven, comprising an active semiconductor device (T) connected serially with the inductive load (L) between first and second terminals of a voltage supply source and having a control terminal for connection to a driver circuit means (C), and a control circuit means (R1,R2,COMP) connected between the inductive load and said control terminal. The control circuit means comprises a voltage divider (R1,R2) connected between the inductive load (L) and the first terminal of the voltage supply source, and a comparator (COMP) having first and second input terminals respectively connected to the voltage divider and to a voltage reference and an output terminal which is coupled to the control terminal of the active element (T).

    9.
    发明专利
    未知

    公开(公告)号:DE69322853D1

    公开(公告)日:1999-02-11

    申请号:DE69322853

    申请日:1993-04-30

    Abstract: A circuit for recycling the discharge current of an inductive load being driven, comprising an active semiconductor device (T) connected serially with the inductive load (L) between first and second terminals of a voltage supply source and having a control terminal for connection to a driver circuit means (C), and a control circuit means (R1,R2,COMP) connected between the inductive load and said control terminal. The control circuit means comprises a voltage divider (R1,R2) connected between the inductive load (L) and the first terminal of the voltage supply source, and a comparator (COMP) having first and second input terminals respectively connected to the voltage divider and to a voltage reference and an output terminal which is coupled to the control terminal of the active element (T).

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