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公开(公告)号:IT201600121618A1
公开(公告)日:2018-05-30
申请号:IT201600121618
申请日:2016-11-30
Applicant: ST MICROELECTRONICS SRL , ST MICROELECTRONICS ROUSSET
Inventor: GRANDE FRANCESCA , LA ROSA FRANCESCO , LO GIUDICE GIANBATTISTA , MATRANGA GIOVANNI
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公开(公告)号:ITMI20110309A1
公开(公告)日:2012-08-29
申请号:ITMI20110309
申请日:2011-02-28
Applicant: ST MICROELECTRONICS SRL
Inventor: CONTE ANTONINO , DI MARTINO ALBERTO JOSE , GIAQUINTA MARIA , MATRANGA GIOVANNI
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公开(公告)号:ITMI20110306A1
公开(公告)日:2012-08-29
申请号:ITMI20110306
申请日:2011-02-28
Applicant: ST MICROELECTRONICS SRL
Inventor: CONTE ANTONINO , DI MARTINO ALBERTO JOSE , GIAQUINTA MARIA , MATRANGA GIOVANNI
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公开(公告)号:IT1404186B1
公开(公告)日:2013-11-15
申请号:ITMI20110306
申请日:2011-02-28
Applicant: ST MICROELECTRONICS SRL
Inventor: CONTE ANTONINO , DI MARTINO ALBERTO JOSE , MATRANGA GIOVANNI , GIAQUINTA MARIA
IPC: G05F1/575
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公开(公告)号:ITMI20062068A1
公开(公告)日:2008-04-28
申请号:ITMI20062068
申请日:2006-10-27
Applicant: ST MICROELECTRONICS SRL
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公开(公告)号:ITMI20120595A1
公开(公告)日:2013-10-13
申请号:ITMI20120595
申请日:2012-04-12
Applicant: ST MICROELECTRONICS SRL
Inventor: GRASSO ROSARIOROBERTO , MATRANGA GIOVANNI , MICCICHE MARIO
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公开(公告)号:IT1319597B1
公开(公告)日:2003-10-20
申请号:ITMI20002763
申请日:2000-12-20
Applicant: ST MICROELECTRONICS SRL
Inventor: CONTE ANTONINO , LA ROCCA ROSANNA MARIA , MATRANGA GIOVANNI
IPC: G11C16/28
Abstract: A reading circuit is provided for reading a memory cell. The reading circuit includes a reference current source, a memory cell biased between its first and second terminals at a predetermined voltage, comparison means for comparing a current flowing in the memory cell with the reference current, and a control gate voltage source coupled to a third terminal of the memory cell. The control gate voltage source includes a virgin memory cell that is biased between two terminals with a voltage of equal value to the biasing voltage of the memory cell. The control gate voltage source produces a control gate voltage at another terminal of the virgin memory cell. In one preferred embodiment, the memory cell and the virgin memory cell are EEPROM cells.
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公开(公告)号:DE69933670D1
公开(公告)日:2006-11-30
申请号:DE69933670
申请日:1999-08-31
Applicant: ST MICROELECTRONICS SRL
Inventor: MATRANGA GIOVANNI , LO COCO LUCA , COMPAGNO GIUSEPPE
Abstract: This invention relates to a CMOS technology temperature sensor of a type which comprises a first circuit portion (2) arranged to generate an electric voltage signal whose value increases with the temperature to be sensed, and a second circuit portion (3) arranged to generate an electric voltage signal whose value decreases with the temperature to be sensed. A comparator (4) is provided as an output stage for comparing the values of both voltage signals. Advantageously, the generator element of the second circuit portion (3) is a vertical bipolar transistor connected in a diode configuration.
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公开(公告)号:ITMI20002763A1
公开(公告)日:2002-06-20
申请号:ITMI20002763
申请日:2000-12-20
Applicant: ST MICROELECTRONICS SRL
Inventor: CONTE ANTONINO , LA ROCCA ROSANNA MARIA , MATRANGA GIOVANNI
IPC: G11C16/28
Abstract: A reading circuit is provided for reading a memory cell. The reading circuit includes a reference current source, a memory cell biased between its first and second terminals at a predetermined voltage, comparison means for comparing a current flowing in the memory cell with the reference current, and a control gate voltage source coupled to a third terminal of the memory cell. The control gate voltage source includes a virgin memory cell that is biased between two terminals with a voltage of equal value to the biasing voltage of the memory cell. The control gate voltage source produces a control gate voltage at another terminal of the virgin memory cell. In one preferred embodiment, the memory cell and the virgin memory cell are EEPROM cells.
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