公开(公告)号：EP0898298A1

公开(公告)日：1999-02-24

申请号：EP97830354.3

申请日：1997-07-15

Applicant: STMicroelectronics S.r.l.

Inventor： Polignano, Maria Luisa ,  Brambilla, Marzio ,  Cazzaniga, Francesco ,  Pavia, Giuseppe ,  Zanderigo, Federica

IPC: H01L21/00 ,  H01L21/66

CPC classification number: H01L22/12

Abstract: The depth of a denuded layer in respect to a relatively defective bulk region of a monocrystalline semiconductor wafer is estimated in a nondestructive way by measuring effective diffusion length of injected excess minority charge carriers on a surface of the wafer having such a denuded layer and on a different portion of the surface of the wafer from where the denuded layer has been previously stripped-off by lapping and/or etching and by calculating the depth of the denuded layer through a best-fit procedure or through numerical processing of the measurement results on the basis of the diffusion equations of excess minority carriers.

Abstract translation: 通过测量在具有这种剥离层的晶片的表面上注入的多余少数电荷载体的有效扩散长度，并以非破坏性方式估计裸晶层相对于单晶半导体晶片的相对有缺陷的体区的深度 已经通过研磨和/或蚀刻已经剥离了剥离层的晶片的表面的不同部分，并且通过最佳拟合程序或通过对测量结果进行数值处理来计算裸露层的深度 过剩少数载体扩散方程的基础。

公开(公告)号：EP0898298B1

公开(公告)日：2007-09-12

申请号：EP97830354.3

申请日：1997-07-15

Applicant: STMicroelectronics S.r.l.

Inventor： Polignano, Maria Luisa ,  Brambilla, Marzio ,  Cazzaniga, Francesco ,  Pavia, Giuseppe ,  Zanderigo, Federica

IPC: H01L21/00 ,  H01L21/66

CPC classification number: H01L22/12

公开(公告)号：EP0991115A1

公开(公告)日：2000-04-05

申请号：EP98830564.5

申请日：1998-09-28

Applicant: STMicroelectronics S.r.l.

Inventor： Beghin, Lorena ,  Canali, Francesca ,  Cazzaniga, Francesco ,  Riva, Luca ,  Romeo, Carmelo

IPC: H01L21/311 ,  H01L21/768

CPC classification number: H01L21/76802 ,  H01L21/31144

Abstract: A process for etching a dielectric layer, providing for forming over the dielectric layer (1) a layer of polysilicon (4), forming over the layer of polysilicon (4) a photoresist mask layer (5), etching the layer of polysilicon (4) using the photoresist mask layer (5) as an etching mask for selectively removing the layer of polysilicon (4), removing the photoresist mask layer (5) from over the layer of polysilicon (4), etching the dielectric layer (1) using the layer of polysilicon (4) as a mask. Subsequently, the layer of polysilicon (4) is converted into a layer of a transition metal silicide (10), and the layer of transition metal silicide (10) is etched for selectively removing the latter from over the dielectric layer (1).

Abstract translation: 一种用于蚀刻电介质层的方法，用于在介电层（1）上形成多晶硅层（4），在多晶硅层（4）上形成光致抗蚀剂掩模层（5），蚀刻多晶硅层（4） ）使用光致抗蚀剂掩模层（5）作为用于选择性地去除多晶硅层（4）的蚀刻掩模，从多晶硅层（4）上去除光致抗蚀剂掩模层（5），使用 多晶硅层（4）作为掩模。 随后，将多晶硅层（4）转换成过渡金属硅化物（10）的层，并且蚀刻过渡金属硅化物层（10），以从介质层（1）上方选择性地将其去除。