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公开(公告)号:EP4220735A1
公开(公告)日:2023-08-02
申请号:EP23153642.6
申请日:2023-01-27
Applicant: STMicroelectronics S.r.l.
Inventor: IUCOLANO, Ferdinando , GIANNAZZO, Filippo , GRECO, Giuseppe , ROCCAFORTE, Fabrizio
IPC: H01L29/778 , H01L21/337 , H01L21/265 , H01L29/10 , H01L29/267 , H01L29/423 , H01L29/08 , H01L29/20
Abstract: High-electron-mobility transistor, HEMT, device (20) in enhancement-mode, comprising: a semiconductor body (35) having a top surface (27b) and including a heterostructure (25, 27) configured to generate a two-dimensional electron gas, 2DEG, (31); and
- a gate structure (32) which extends on the top surface (27b) of the semiconductor body (35), is biasable to electrically control the 2DEG (31) and comprises a functional layer (34) and a gate contact (33) in direct physical and electrical contact with each other. The gate contact (33) is of conductive material and the functional layer (34) is of two-dimensional semiconductor material and comprises a first doped portion (40') with P-type electrical conductivity, which extends on the top surface (27b) of the semiconductor body (35) and is interposed between the semiconductor body (35) and the gate contact (33) along a first axis (Z).-
2.
公开(公告)号:EP4152406A1
公开(公告)日:2023-03-22
申请号:EP22193143.9
申请日:2022-08-31
Applicant: STMicroelectronics S.r.l.
Inventor: GIANNAZZO, Filippo , GRECO, Giuseppe , ROCCAFORTE, Fabrizio , RASCUNÀ, Simone
IPC: H01L29/06 , H01L29/267 , H01L29/66 , H01L29/872
Abstract: Merged-PiN-Schottky, MPS, device (50) comprising: a solid body (52, 53) having a first electrical conductivity (N); an implanted region (59) extending into the solid body (52, 53) facing a front side (52a) of the solid body (52, 53), having a second electrical conductivity (P) opposite to the first electrical conductivity (N); and a semiconductor layer (61) extending on the front side (52a), of a material which is a transition metal dichalcogenide, TMD. A first region (61') of the semiconductor layer (61) has the second electrical conductivity (P) and extends in electrical contact with the implanted region (59), and a second region (61") of the semiconductor layer (61) has the first electrical conductivity (N) and extends adjacent to the first region (61') and in electrical contact with a respective surface portion of the front side (52a) having the first electrical conductivity (N).
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3.
公开(公告)号:EP3413353A1
公开(公告)日:2018-12-12
申请号:EP18176876.3
申请日:2018-06-08
Applicant: STMicroelectronics S.r.l.
Inventor: IUCOLANO, Ferdinando , GRECO, Giuseppe , ROCCAFORTE, Fabrizio
IPC: H01L29/778
CPC classification number: H01L29/7786 , H01L23/291 , H01L29/1066 , H01L29/1087 , H01L29/2003 , H01L29/207 , H01L29/41766 , H01L29/4236 , H01L29/66462 , H01L29/7378
Abstract: Normally-off HEMT transistor (1; 21; 31) comprising a heterostructure (3) including a channel layer (4) and a barrier layer (6) on the channel layer (4); a 2DEG layer in the heterostructure (3); an insulation layer (7) in contact with a first region of the barrier layer (6); and a gate electrode (8) through the whole thickness of the insulation layer (7), terminating in contact with a second region (6') of the barrier layer (6). The barrier layer (6) and the insulation layer (7) have a mismatch of the lattice constant ("lattice mismatch"), which generates a mechanical stress solely in the first region of the barrier layer (6), giving rise to a first concentration of electrons (n s ) in a first portion of the two-dimensional conduction channel which is under the first region of the barrier layer (6) which is greater than a second concentration of electrons (n s ) in a second portion of the two-dimensional conduction channel which is under the second region (6') of the barrier layer (6) .
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公开(公告)号:EP4231360A1
公开(公告)日:2023-08-23
申请号:EP23156230.7
申请日:2023-02-13
Applicant: STMicroelectronics S.r.l.
Inventor: IUCOLANO, Ferdinando , SEVERINO, Andrea , GRECO, Giuseppe , ROCCAFORTE, Fabrizio
IPC: H01L29/778 , H01L21/338 , H01L29/417 , H01L29/20
Abstract: For the manufacturing of a HEMT device (50), from a wafer (2) of silicon carbide having a surface (2A), an epitaxial layer (4) of silicon carbide is formed on the surface (2A) of the wafer (2), a semiconductive heterostructure (5) is formed on the epitaxial layer, and the wafer of silicon carbide is removed.
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公开(公告)号:EP4220687A1
公开(公告)日:2023-08-02
申请号:EP23152626.0
申请日:2023-01-20
Applicant: STMicroelectronics S.r.l.
Inventor: IUCOLANO, Ferdinando , GRECO, Giuseppe , BADALA', Paolo , ROCCAFORTE, Fabrizio , SPERA, Monia
IPC: H01L21/285 , H01L29/45 , H01L21/335 , H01L29/778 , H01L21/027 , H01L29/20 , H01L29/417
Abstract: For manufacturing a HEMT device (1), a conductive region (15, 16) is formed on a work body (50) having a semiconductive heterostructure (8). To obtain the conductive region, a first reaction region (66) having carbon is formed on the heterostructure; and a metal stack (70) is formed having a second reaction region (70A) in contact with the first reaction region. The work body is annealed, so that the first reaction region (66) reacts with the second reaction region (70A), thus forming an interface portion (25) of the conductive region. The interface portion is of a compound having carbon and is in ohmic contact with the semiconductive heterostructure.
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