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公开(公告)号:EP3836228A1
公开(公告)日:2021-06-16
申请号:EP20211345.2
申请日:2020-12-02
Applicant: STMicroelectronics S.r.l.
Inventor: IUCOLANO, Ferdinando , CHINI, Alessandro
IPC: H01L29/778 , H01L21/338 , H01L29/41 , H01L29/423 , H01L29/20
Abstract: HEMT transistor (50; 100; 150) having a semiconductor body (52) forming a semiconductive heterostructure (54, 56); a gate region (60), of conductive material, arranged above and in contact with the semiconductor body (52); a first insulating layer (58) extending above the semiconductor body, laterally to the conductive gate region (60); a second insulating layer (62) extending above the first insulating layer (58) and the gate region (60); a first field plate region (84), of conductive material, extending between the first and the second insulating layers (58), laterally spaced from the conductive gate region (60); and a second field plate region (85), of conductive material, extending above the second insulating layer (62), vertically aligned with the first field plate region (84).
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公开(公告)号:EP4220735A1
公开(公告)日:2023-08-02
申请号:EP23153642.6
申请日:2023-01-27
Applicant: STMicroelectronics S.r.l.
Inventor: IUCOLANO, Ferdinando , GIANNAZZO, Filippo , GRECO, Giuseppe , ROCCAFORTE, Fabrizio
IPC: H01L29/778 , H01L21/337 , H01L21/265 , H01L29/10 , H01L29/267 , H01L29/423 , H01L29/08 , H01L29/20
Abstract: High-electron-mobility transistor, HEMT, device (20) in enhancement-mode, comprising: a semiconductor body (35) having a top surface (27b) and including a heterostructure (25, 27) configured to generate a two-dimensional electron gas, 2DEG, (31); and
- a gate structure (32) which extends on the top surface (27b) of the semiconductor body (35), is biasable to electrically control the 2DEG (31) and comprises a functional layer (34) and a gate contact (33) in direct physical and electrical contact with each other. The gate contact (33) is of conductive material and the functional layer (34) is of two-dimensional semiconductor material and comprises a first doped portion (40') with P-type electrical conductivity, which extends on the top surface (27b) of the semiconductor body (35) and is interposed between the semiconductor body (35) and the gate contact (33) along a first axis (Z).-
公开(公告)号:EP4092756A3
公开(公告)日:2023-02-22
申请号:EP22184384.0
申请日:2018-06-08
Applicant: STMicroelectronics S.r.l.
Inventor: IUCOLANO, Ferdinando , CHINI, Alessandro
IPC: H01L29/778 , H01L21/336 , H01L29/10 , H01L29/417 , H01L29/20 , H01L29/423 , H01L29/207
Abstract: HEMT (1; 21; 31; 51) including a buffer layer (4), a hole-supply layer (6) on the buffer layer (4), a heterostructure (7) on the hole-supply layer (6), and a source electrode (16). The hole-supply layer (6) is made of P-type doped semiconductor material, the buffer layer (4) is doped with carbon, and the source electrode (16) is in direct electrical contact with the hole-supply layer (6), such that the hole-supply layer (6) can be biased to facilitate the transport of holes from the hole-supply layer (6) to the buffer layer (4) .
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公开(公告)号:EP3514835A1
公开(公告)日:2019-07-24
申请号:EP19153397.5
申请日:2019-01-23
Applicant: STMicroelectronics S.r.l.
Inventor: IUCOLANO, Ferdinando
IPC: H01L29/778 , H01L21/337 , H01L29/10 , H01L29/20
Abstract: A manufacturing method of a HEMT, comprising the steps of: forming a heterostructure (7); forming a first gate layer of intrinsic semiconductor material on the heterostructure; forming a second gate layer, containing dopant impurities of a P type, on the first gate layer; removing first portions of the second gate layer so that second portions, not removed, of the second gate layer form a doped gate region (12); and carrying out a thermal annealing of the doped gate region so as to cause a diffusion of said dopant impurities of a P type in the first gate layer and in the heterostructure, with a concentration, in the heterostructure, that decreases as the lateral distance from the doped gate region increases.
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5.
公开(公告)号:EP3413353A1
公开(公告)日:2018-12-12
申请号:EP18176876.3
申请日:2018-06-08
Applicant: STMicroelectronics S.r.l.
Inventor: IUCOLANO, Ferdinando , GRECO, Giuseppe , ROCCAFORTE, Fabrizio
IPC: H01L29/778
CPC classification number: H01L29/7786 , H01L23/291 , H01L29/1066 , H01L29/1087 , H01L29/2003 , H01L29/207 , H01L29/41766 , H01L29/4236 , H01L29/66462 , H01L29/7378
Abstract: Normally-off HEMT transistor (1; 21; 31) comprising a heterostructure (3) including a channel layer (4) and a barrier layer (6) on the channel layer (4); a 2DEG layer in the heterostructure (3); an insulation layer (7) in contact with a first region of the barrier layer (6); and a gate electrode (8) through the whole thickness of the insulation layer (7), terminating in contact with a second region (6') of the barrier layer (6). The barrier layer (6) and the insulation layer (7) have a mismatch of the lattice constant ("lattice mismatch"), which generates a mechanical stress solely in the first region of the barrier layer (6), giving rise to a first concentration of electrons (n s ) in a first portion of the two-dimensional conduction channel which is under the first region of the barrier layer (6) which is greater than a second concentration of electrons (n s ) in a second portion of the two-dimensional conduction channel which is under the second region (6') of the barrier layer (6) .
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公开(公告)号:EP4239686A1
公开(公告)日:2023-09-06
申请号:EP23159048.0
申请日:2023-02-28
Applicant: STMicroelectronics S.r.l.
Inventor: IUCOLANO, Ferdinando , CHINI, Alessandro
IPC: H01L29/778 , H01L21/338 , H01L21/336 , H01L29/423 , H01L29/417 , H01L29/20
Abstract: The HEMT device (50) is formed by a heterostructure (62), by an insulation layer (68) that extends on the heterostructure and has a thickness along a first direction (Z), and by a gate region (74). The gate region has a first portion (74A) that extends through the insulation layer, throughout the thickness of the insulation layer, and has a second portion (74B) that extends in the heterostructure. The first portion of the gate region has a first width (Lw) along a second direction (X) transverse to the first direction. The second portion of the gate region has a second width (Lb), along the second direction, that is different from the first width.
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公开(公告)号:EP4068534A1
公开(公告)日:2022-10-05
申请号:EP22305409.9
申请日:2022-03-31
Inventor: PIZZARDI, Antonio Filippo Massimo , SMERZI, Santo Alessandro , IUCOLANO, Ferdinando , LETOR, Romeo
Abstract: An electronic device (1000) couplable to a plurality of laser diodes (LD_j) and comprising a semiconductor body (504) including: a control switch (S1) having a drain (DS1) coupled to a drain metallization (530) and having a source (SS1) coupled to a first source metallization (532) electrically couplable to cathodes (LDc_j) of the laser diodes (LD_j); a respective plurality of first switches (S2_j), each first switch (S2_j) having a drain (DS2_j) coupled to the drain metallization (530) and having a source (SS2_j) coupled to a respective second source metallization (534_j) couplable to an anode (LDa_j) of one of the laser diodes (LD_j). The second source metallizations (534_j) are aligned with one another in a direction of alignment (520), overlie, in a direction orthogonal to the direction of alignment (520), the respective sources (SS2_j) of the first switches (S2_j), and can be aligned, in a direction orthogonal to the direction of alignment (520), to the respective laser diodes (LD_j). At least one of the sources (SS2_j) of the first switches (S2_j) can be aligned, in a direction orthogonal to the direction of alignment (520), to the respective laser diode (LD_j).
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公开(公告)号:EP3660923A1
公开(公告)日:2020-06-03
申请号:EP19212334.7
申请日:2019-11-28
Applicant: STMicroelectronics S.r.l.
Inventor: IUCOLANO, Ferdinando , TRINGALI, Cristina
IPC: H01L29/45 , H01L21/441 , H01L21/18 , H01L21/285
Abstract: A method for manufacturing an ohmic contact (22) for a HEMT device (1), comprising the steps of: forming a photoresist layer (28), on a semiconductor body (5) comprising a heterostructure (17); forming, in the photoresist layer (28), an opening (35), through which a surface region (19) of the semiconductor body (5) is exposed at said heterostructure (17); etching the surface region (19) of the semiconductor body (5) using the photoresist layer (28) as etching mask to form a trench (42) in the heterostructure (17); depositing one or more metal layers in said trench (42) and on the photoresist layer (28); and carrying out a process of lift-off of the photoresist layer (28) .
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公开(公告)号:EP3657549A1
公开(公告)日:2020-05-27
申请号:EP19210472.7
申请日:2019-11-20
Applicant: STMicroelectronics S.r.l.
Inventor: IUCOLANO, Ferdinando
IPC: H01L29/778 , H01L23/29 , H01L29/423 , H01L29/417 , H01L29/20
Abstract: A HEMT transistor (31) comprising: a heterostructure (13); a dielectric layer (17) on the heterostructure; a gate electrode (18), which extends throughout the thickness of the dielectric layer; a source electrode (21); and a drain electrode (22). The dielectric layer extends between the gate electrode (18) and the drain electrode (22) and is absent between the gate electrode and the source electrode. In this way, the distance between the gate electrode and the source electrode can be designed in the absence of constraints due to a field plate that extends towards the source electrode.
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10.
公开(公告)号:EP4220734A1
公开(公告)日:2023-08-02
申请号:EP23152421.6
申请日:2023-01-19
Applicant: STMicroelectronics S.r.l.
Abstract: A wide band gap transistor includes a semiconductor structure (2), having at least one wide band gap semiconductor layer (14, 16) of gallium nitride (GaN) or silicon carbide (SiC), an insulating gate structure (8) and a gate electrode (7), separated from the semiconductor structure (2) by the insulating gate structure (8). The insulating gate structure (8) contains a mixture of aluminum, hafnium and oxygen and is completely amorphous.
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