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1.发明公开
公开(公告)号：EP3025792A1
公开(公告)日：2016-06-01
申请号：EP15196387.3
申请日：2015-11-25
Applicant: STMicroelectronics S.r.l.
Inventor： ROSSI, Sandro , GHISU, Davide Ugo , QUAGLIA, Fabio , LEONE, Antonio Davide
CPC classification number: G05F3/02 , B06B1/0215 , H03K4/94 , H03K17/162
Abstract: A transmission channel transmits high-voltage pulses and receives echos of the high-voltage pulses. The transmission channel includes a current generator circuit (104), which generates current-integrator drive currents, a receiver (108), which amplifies transducer-echo signals, and control circuitry (102). The control circuitry generates one or more control signals to control generation of current-integrator drive currents by the current generator circuit during transducer-driving periods and reception of transducer-echo signals by the receiver during echo-reception periods. A current integrator (106) integrates current-integrator drive currents generated by current generator circuit to generate transducer drive signals.
Abstract translation: 传输通道传输高电压脉冲并接收高电压脉冲的回波。 传输通道包括产生电流积分器驱动电流的电流发生器电路（104），放大换能器回波信号的接收器（108）和控制电路（102）。 控制电路产生一个或多个控制信号，以在换能器驱动周期期间由电流发生器电路控制电流积分器驱动电流的产生，并且在回波接收周期期间由接收器接收换能器 - 回波信号。 电流积分器（106）集成由电流发生器电路产生的电流积分器驱动电流以产生换能器驱动信号。
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Patent Agency Ranking2.发明公开
公开(公告)号：EP4250561A1
公开(公告)日：2023-09-27
申请号：EP23159134.8
申请日：2023-02-28
Applicant: STMicroelectronics S.r.l.
Inventor： ROGLEDI, Nicola , POLETTO, Vanni , LEONE, Antonio Davide
Abstract: A circuit arrangement of an amplifier with currentcontrolled gain, said circuit arrangement (30; 40; 50) having a symmetrical differential structure, comprising a differential input stage (21), which includes, on each differential branch, an input transistor, in particular a MOSFET (M1, M2), coupled, in particular through an input resistance ( R I ), to an input node (NI), there being set between said input node (N1) and ground (GND) a current generator (22) for biasing the input stage (21) that supplies, said input stage (21) being configured for operating with a constant input biasing, an input voltage (Vin) being applied between the inputs of the input transistors (M1, M2), a drain electrode of the input transistor (M1) being coupled to the supply voltage (Vss) through a respective diode (D1, D2), as well as to a differential output amplification stage (23) having bipolar transistors (T1, T2) with coupled emitters, there being coupled to said emitters a current generator (24) for biasing the output stage (23, 33) which generates an output current ( I bOUT ) and comprises, on each differential branch, a bipolar transistor (T1, T2; B2) biased in the active region, the base electrode of which is coupled to the drain electrode of the input transistor (M1, M2) and the collector electrode of which is coupled to the supply voltage (Vss), while coupled to its emitter electrode is a current generator (24) for biasing the output stage (23, 33) which generates an output current ( I bOUT ) , an output voltage (Vout) being drawn from between the collectors of the bipolar transistors (T1, T2), said output stage (23, 33) being configured with constant output biasing,
said circuit arrangement being configured for controlling a gain between the input and the output by controlling the values of input and output biasing current;
said circuit arrangement (30) being configured for supplying a first reference current ( I d ) and a second reference current ( I n ) having complementary values such that their sum is constant, the value of said input biasing current ( I bIN ) corresponding to the first reference current ( I d ), and the output biasing current ( I bOUT ) corresponding to the sum ( I d + I n ) of said first reference current ( I d ) and said second reference current ( I n ).-
3.发明公开
公开(公告)号：EP4207604A1
公开(公告)日：2023-07-05
申请号：EP22211363.1
申请日：2022-12-05
Applicant: STMicroelectronics S.r.l.
Inventor： POLETTO, Vanni , ROGLEDI, Nicola , LEONE, Antonio Davide
Abstract: An analog to digital converter apparatus, adapt to receive a continuous input signal (Vdiff; Vi+,V-,i+,i-),
comprising an integrating block (11; 11, 12), comprising at least an integrating stage, which output is coupled to a flash analog to digital converter (13; 33),
said analog to digital converter apparatus comprising a feedback path (15; 151, 152; 35; 351, 352) coupled to the output (DO) of said flash analog to digital converter (13; 33), said feedback path comprising at least a digital to analog conversion block (15; 151, 152; 35; 351, 352) which output (Vfeed; II, 12) is compared (21; 21, 22) at least to the input signal (Vdiff; Vi+,V-,i+,i-) to obtain an error signal (Ev; Ev; Ev2) which is brought as input to said integrating block (11; 11, 12),
wherein a control block (34) configured to perform a control comprising at least a digital integration (343), is coupled between the output of said flash analog to digital converter (33) and said feedback path (35; 351, 352).-
公开(公告)号：EP3025792B1
公开(公告)日：2019-09-04
申请号：EP15196387.3
申请日：2015-11-25
Applicant: STMicroelectronics S.r.l.
Inventor： ROSSI, Sandro , GHISU, Davide Ugo , QUAGLIA, Fabio , LEONE, Antonio Davide
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5.发明公开
公开(公告)号：EP4345464A1
公开(公告)日：2024-04-03
申请号：EP23196500.5
申请日：2023-09-11
Applicant: STMicroelectronics S.r.l.
Abstract: Described herein is a method for sensing at a pre-driving stage (12) driving one or more Field Effect Transistor (MHx, MLx), in particular MOSFET, comprised in a power stage (13) driving a load (DC1...DC4), a current flowing in said Field Effect Transistor (MHx, MLx), in particular MOSFET, the Field Effect Transistor being arranged external with respect to a chip on which said pre-driving stage (12) is arranged,
said method comprising
measuring (120) a drain to source voltage (VDS_HSx, VDS_LSx), of said one or more Field Effect Transistor (MHX, MLx),
measuring (130) an operating temperature (T W ) of said one or more Field Effect Transistor (MHX, MLx),
measuring (140) a current (IHX, ILx) flowing in said one or more Field Effect Transistor (MHX, MLx) by
calculating (142) the respective on drain to source resistance at the operating temperature (RdsONx(T W )) as a function (RdsONx(T W )) of said measured operating temperature (T W ) and by obtaining (144) said current (IHX, ILx) as the ratio of the respective measured drain to source voltage (VDS_HSx, VDS_LSx) over said calculated drain to source resistance at the operating temperature (RdsONx(T W )).-
公开(公告)号：EP4246179A1
公开(公告)日：2023-09-20
申请号：EP23158628.0
申请日：2023-02-24
Applicant: STMicroelectronics S.r.l.
Inventor： LEONE, Antonio Davide , POLETTO, Vanni
IPC: G01S7/524 , G01S15/10 , G01S15/931 , B06B1/02 , G01S7/52
Abstract: An ultrasound transmitter device for driving piezoelectric transducers,
comprising a central-tap transformer (11) and a piezoelectric transducer (12) coupled to the terminals of the secondary output winding of said central-tap transformer (11) from which it receives a controlled current (Ip),
said central-tap transformer (11) comprising a primary winding, which includes terminals (DRV1, DRV2) at the ends of said primary winding and a central terminal (DRVC), said central terminal (DRVC) being coupled to a constant d.c. voltage, in particular a battery voltage (VBAT), said end terminals (DRV1, DRV2) being coupled, through respective transistors (Q1, Q2), in particular MOSFETs, which operate in push-pull mode, to a ground voltage (GND), said transistors (Q1, Q2) operating in push-pull mode being driven into their own open and closed states by respective complementary pulse sequences (SP, SPn), wherein:
said transmitter device (20) comprises a digital-to-analog converter (21), which supplies an analog current (Idac) to a driving amplifier (22) configured for determining the flowing of a driving current (Iout) in said transistors (Q1, Q2) operating in push-pull mode,
said transistors (Q1, Q2) operating in push-pull mode are coupled to said ground terminal (GND) through a sense resistance (Rsense),
the output of said digital-to-analog converter (21) is coupled to an input terminal (NR) of the driving amplifier (22), which is also coupled to the ground terminal (GND) through a reference resistance (Rref) having a value proportional to, in particular a multiple or a divisor of, the value of the sense resistance (Rsense),
said sense resistance (Rsense) being coupled to the other input terminal of the driving amplifier (22).
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