公开(公告)号：EP2202791A2

公开(公告)日：2010-06-30

申请号：EP10160512.9

申请日：2005-11-16

Applicant: STMicroelectronics S.r.l.

Inventor： Marchi, Mauro ,  Ferrera, Marco ,  Riva, Caterina

IPC: H01L23/48 ,  H01L21/762

CPC classification number: B81B7/0006 ,  B81B2201/0242 ,  B81B2201/0257 ,  H01L21/76267 ,  H01L21/76898 ,  H01L23/481 ,  H01L2924/0002 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A semiconductor device includes a body (1) and, in the body (1): a semiconductor substrate (2), a semiconductor structural layer (10) and a dielectric layer (12) therebetween. A through interconnection via (30) traverses the body (1) and extends through the dielectric layer (12). The through interconnection via (30) has: a front-side interconnection region (17), including a portion of the structural layer (10) that extends between the dielectric layer (12) and a front face (10a) of the body (1) and is laterally insulated from the remainder of the structural layer (10); a back-side interconnection region (27), including a portion of the substrate (2) that extends between the dielectric layer (12) and a back face (2a) of the body (1) and is laterally insulated from the remainder of the substrate (2) by a back-side insulation trench (29). The back-side insulation trench (29) extends across the entire substrate (2; 102; 202), from the back face (2a) of the body (1) to the dielectric layer (12) the; and a conductive continuity region (8) connecting the front-side interconnection region (17) and the back-side interconnection region (27) through the dielectric layer (12).

Abstract translation: 一种半导体器件包括主体（1），并且在主体（1）中：半导体衬底（2），半导体结构层（10）和其间的介电层（12）。 （30）的直通互连穿过主体（1）并延伸穿过介电层（12）。 （30）的贯穿互连具有：正面互连区域（17），其包括在介电层（12）和主体（1）的正面（10a）之间延伸的结构层（10）的一部分 ）并且与结构层（10）的其余部分横向绝缘; 包括在所述介电层（12）和所述主体（1）的背面（2a）之间延伸的所述衬底（2）的一部分的背侧互连区域（27），并且与所述衬底 衬底（2）通过背侧绝缘沟槽（29）。 背面绝缘沟槽（29）从主体（1）的背面（2a）延伸到整个衬底（2; 102; 202）到介电层（12） 以及通过介电层（12）连接前侧互连区域（17）和后侧互连区域（27）的导电连续区域（8）。

公开(公告)号：EP1788624A1

公开(公告)日：2007-05-23

申请号：EP05425807.4

申请日：2005-11-16

Applicant: STMicroelectronics S.r.l.

Inventor： Marchi, Mauro ,  Ferrera, Marco ,  Riva, Caterina

IPC: H01L23/48

CPC classification number: B81B7/0006 ,  B81B2201/0242 ,  B81B2201/0257 ,  H01L21/76267 ,  H01L21/76898 ,  H01L23/481 ,  H01L2924/0002 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A process for manufacturing a through via in a semiconductor device includes the steps of: forming a body (1) comprising a structural layer (10), a substrate (2), and a dielectric layer (12) set between the structural layer (10) and the substrate (2); insulating a portion of the structural layer (10) to form a front-side interconnection region (17); insulating a portion of the substrate (2) to form a back-side interconnection region (27); and connecting the front-side interconnection region (17) and the back-side interconnection region (27) through the dielectric layer (12).

Abstract translation: 在半导体器件中制造通孔的方法包括以下步骤：形成包括结构层（10），基底（2）和设置在结构层（10）之间的介电层（12）的主体（1） ）和基板（2）; 绝缘所述结构层（10）的一部分以形成正面互连区域（17）; 绝缘所述基板（2）的一部分以形成背面互连区域（27）; 并且通过电介质层（12）将前侧互连区域（17）和背面侧互连区域（27）连接起来。

公开(公告)号：EP1296374A1

公开(公告)日：2003-03-26

申请号：EP01830590.4

申请日：2001-09-14

Applicant: STMicroelectronics S.r.l. ,  Hewlett Packard Company, a Delaware Corporation

Inventor： Mastromatteo, Ubaldo ,  Bombonati, Mauro ,  Morin, Daniela ,  Mottura, Marta ,  Marchi, Mauro

IPC: H01L23/48 ,  B81B7/00 ,  H01L21/18

CPC classification number: B81C1/00269 ,  H01L21/185 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/81 ,  H01L24/94 ,  H01L2224/0231 ,  H01L2224/02313 ,  H01L2224/0401 ,  H01L2224/05124 ,  H01L2224/05181 ,  H01L2224/05624 ,  H01L2224/10126 ,  H01L2224/10135 ,  H01L2224/13021 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/13124 ,  H01L2224/13164 ,  H01L2224/81136 ,  H01L2224/81139 ,  H01L2224/812 ,  H01L2224/81201 ,  H01L2224/81385 ,  H01L2224/81801 ,  H01L2924/00013 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01073 ,  H01L2924/01078 ,  H01L2924/01322 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2224/29099 ,  H01L2924/013

Abstract: A process for bonding two distinct substrates that integrate microsystems, comprising the steps of: making micro-integrated devices in at least one of the two substrates using microelectronic processing techniques; and bonding said substrates. The bonding is performed by making on a first substrate (33) bonding regions (32) of deformable material and by pressing said substrates one against another so as to deform the bonding regions and to cause them to react chemically with the second substrate (34). The bonding regions are preferably formed by a thick layer (30) made of a material chosen from among aluminium, copper and nickel, covered by a thin layer (31) made of a material chosen from between palladium and platinum. Spacing regions (25') guarantee exact spacing between the two wafers.

Abstract translation: 一种用于接合两个不同的基板的制造方法做了集成微，包括以下步骤：制作集成在使用微电子加工技术在两个基底中的至少一个微器件; 和键合所述基底上。 接合被执行，通过使可变形材料制成的第一衬底（33）键合区域（32），并通过按压所述基板中的一个对另一个以变形的接合区域和以使它们与所述第二基片起化学反应（34） ， 接合区域优选通过由选自铝，铜和镍中选择的材料的一厚层（30），通过由从钯和铂之间选择的材料的薄层（31）覆盖而形成。 间隔区（25“），保证了两个晶片之间的精确间距。

公开(公告)号：EP2202791A3

公开(公告)日：2011-04-13

申请号：EP10160512.9

申请日：2005-11-16

Applicant: STMicroelectronics S.r.l.

Inventor： Marchi, Mauro ,  Ferrera, Marco ,  Riva, Caterina

IPC: H01L23/48 ,  H01L21/762

CPC classification number: B81B7/0006 ,  B81B2201/0242 ,  B81B2201/0257 ,  H01L21/76267 ,  H01L21/76898 ,  H01L23/481 ,  H01L2924/0002 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A semiconductor device includes a body (1) and, in the body (1): a semiconductor substrate (2), a semiconductor structural layer (10) and a dielectric layer (12) therebetween. A through interconnection via (30) traverses the body (1) and extends through the dielectric layer (12). The through interconnection via (30) has: a front-side interconnection region (17), including a portion of the structural layer (10) that extends between the dielectric layer (12) and a front face (10a) of the body (1) and is laterally insulated from the remainder of the structural layer (10); a back-side interconnection region (27), including a portion of the substrate (2) that extends between the dielectric layer (12) and a back face (2a) of the body (1) and is laterally insulated from the remainder of the substrate (2) by a back-side insulation trench (29). The back-side insulation trench (29) extends across the entire substrate (2; 102; 202), from the back face (2a) of the body (1) to the dielectric layer (12) the; and a conductive continuity region (8) connecting the front-side interconnection region (17) and the back-side interconnection region (27) through the dielectric layer (12).

公开(公告)号：EP1624284A1

公开(公告)日：2006-02-08

申请号：EP04425573.5

申请日：2004-07-29

Applicant: STMicroelectronics S.r.l.

Inventor： Sassolini, Simone ,  del Sarto, Marco ,  Baldo, Lorenzo ,  Marchi, Mauro

IPC: G01C19/56

CPC classification number: G01C19/5755 ,  G01C19/5769

Abstract: The semiconductor inertial sensor (30) is formed by a rotor element (38) and a stator element (39) electrostatically coupled together. The rotor element (38) is formed by a suspended mass (40) and by a plurality of mobile electrodes (41) extending from the suspended mass (40). The stator element (39) is formed by a plurality of fixed electrodes (42) facing respective mobile electrodes (41). The suspended mass (40) is supported by elastic suspension elements (45). The suspended mass (40) has a first, larger, thickness (t1 + t2), and the elastic suspension elements (45) have a second thickness (t1), smaller than the first thickness.

Abstract translation: 半导体惯性传感器（30）由静电耦合在一起的转子元件（38）和定子元件（39）形成。 转子元件（38）由悬挂质量块（40）和从悬浮块（40）延伸的多个可移动电极（41）形成。 定子元件（39）由面对各自的可动电极（41）的多个固定电极（42）形成。 悬挂质量（40）由弹性悬挂元件（45）支撑。 悬挂质量（40）具有第一，较大的厚度（t1 + t2），并且弹性悬挂元件（45）具有小于第一厚度的第二厚度（t1）。

公开(公告)号：EP1617178A1

公开(公告)日：2006-01-18

申请号：EP04425514.9

申请日：2004-07-12

Applicant: STMicroelectronics S.r.l.

Inventor： Spinola Durante, Guido ,  Sassolini, Simone ,  Ferrera, Marco ,  Marchi, Mauro

IPC: G01C19/56

CPC classification number: G01C19/5769

Abstract: Micro-electro-mechanical structure formed by a substrate (41) of semiconductor material and a suspended mass (10, 20) extending above the substrate (41) and separated therefrom by an air gap (55). An insulating region (23, 24) of a first electrically insulating material extends through the suspended mass (10, 20) and divides it into at least one first electrically insulated suspended region and one second electrically insulated suspended region (10a, 10b, 20a, 20b). A plug element (46) of a second electrically insulating material different from the first electrically insulating material is formed underneath the insulating region (23, 24) and constitutes a barrier between the insulating region and the air gap (55) for preventing removal of the insulating region during fabrication, when an etching agent is used for removing a sacrificial layer and forming the air gap.

Abstract translation: 由半导体材料与悬挂质量（10，20）的基板（41）形成的微机电结构的基片（41）和从通过在空气间隙（55）隔开有上方延伸。 一个第一电绝缘材料制成的绝缘区域（23，24）通过所述悬挂质量（10，20）延伸，并且它分成至少一个第一电绝缘的悬浮区域和至少一个第二电绝缘的悬浮区域（10A，10B，20A， 20B）。 从第一电绝缘材料不同的第二电绝缘材料制成的插头元件（46）被形成在所述绝缘区下面（23，24）和用于防止去除的构成绝缘区域和所述空气间隙（55）之间的阻挡 制造中，当蚀刻剂用于去除牺牲层和形成空气间隙期间绝缘区域。

公开(公告)号：EP1359569A1

公开(公告)日：2003-11-05

申请号：EP02425276.9

申请日：2002-05-03

Applicant: STMicroelectronics S.r.l.

Inventor： Del Sarto, Marco ,  Marchi, Mauro ,  Baldo, Lorenzo ,  Sassolini, Simone

IPC: G11B5/48

CPC classification number: G11B5/4826

Abstract: A read/write assembly for magnetic hard disks includes at least: one supporting element (5, 8); one read/write (R/W) transducer (6); one micro-actuator (10), set between the R/W transducer (6) and the supporting element (5, 8); one electrical-connection structure (11) for connection to a remote device carried by the supporting element (5,8) and connected to the R/W transducer (6) and to the micro-actuator (10) In addition, a protective structure (15), set so as to cover the micro-actuator (10) is made of a single piece with the electrical-connection structure (11).

Abstract translation: 用于磁性硬盘的读/写组件至少包括：一个支撑元件（5,8）; 一个读/写（R / W）传感器（6）; 设置在R / W换能器（6）和支撑元件（5,8）之间的一个微致动器（10）; 一个电连接结构（11），用于连接到由支撑元件（5,8）承载并连接到R / W换能器（6）和微致动器（10）的远程设备。另外，保护结构 （15），以覆盖微致动器（10）的方式由具有电连接结构（11）的单件制成。