Process for manufacturing a micromechanical structure having a buried area provided with a filter
    1.
    发明公开
    Process for manufacturing a micromechanical structure having a buried area provided with a filter 有权
    一种用于与带有滤波器的掩埋区制造微机械结构的方法

    公开(公告)号:EP2412665A1

    公开(公告)日:2012-02-01

    申请号:EP11175428.9

    申请日:2011-07-26

    Abstract: A process for manufacturing a micromechanical structure (25) envisages: forming a buried cavity (10) within a body (1, 12) of semiconductor material, separated from a top surface (12a) of the body by a first surface layer (12); and forming an access duct (18a) for fluid communication between the buried cavity (10) and an external environment. The method envisages: forming an etching mask (14) on the top surface (12a) at a first access area (17a); forming a second surface layer (15) on the top surface (12a) and on the etching mask (14); carrying out an etch such as to remove, in a position corresponding to the first access area, a portion of the second surface layer (15), and an underlying portion of the first surface layer (12) not covered by the etching mask (14) until the buried cavity is reached, thus forming both the first access duct (18a) and a filter element (20), set between the first access duct and the same buried cavity.

    Abstract translation: 一种用于制造微机械结构(25)设想过程:半导体材料的主体(1,12)内形成掩埋空腔(10),由第一表面层与所述主体的顶面(12a)的分离(12) ; 以及形成到埋入腔(10)之间,并与外部环境中访问管道(18)流体连通。 该方法设想:在在第一接入区域(17a)的蚀刻顶表面(12A)上掩模(14)成形; 形成所述顶面(12A)上的第二表面层(15)和在蚀刻掩模(14); 进行蚀刻:如以除去,在对应于所述第一接入区,第二表面层(15)的一部分的位置,并在第一表面层(12)未包括的蚀刻掩模的下层部分(14 )达到掩埋空腔直到,从而形成两个第一接入管道(18a)和一个过滤器元件(20),所述第一进出管道和相同的掩埋空腔之间。

    Process for manufacturing components in a semiconductor material with reduction in the starting wafer thickness
    2.
    发明公开
    Process for manufacturing components in a semiconductor material with reduction in the starting wafer thickness 审中-公开
    制造组件的过程中的半导体晶片与减少盘的初始厚度的

    公开(公告)号:EP1217656A1

    公开(公告)日:2002-06-26

    申请号:EP00830835.5

    申请日:2000-12-20

    CPC classification number: H01L21/2007 H01L21/76256

    Abstract: A process for manufacturing components in a multi-layer wafer, including the steps of: providing a multi-layer wafer (8) comprising a first semiconductor material layer (9), a second semiconductor material layer (21), and a dielectric material layer (10) arranged between the first and the second semiconductor material layer (8, 9); and removing the first semiconductor material layer (9) initially by mechanically thinning the first semiconductor material layer (9), so as to form a residual conductive layer (9'), and subsequently by chemically removing the residual conductive layer (9'). In one application, the multi-layer wafer (8) is bonded to a first wafer (1) of semiconductor material, with the second semiconductor material layer (21) facing the first wafer (1), after micro-electromechanical structures (37) have been formed in the second semiconductor material layer (21) of the multi-layer wafer.

    Abstract translation: 提供(8)包括一个第一半导体材料层(9),第二半导体材料层(21),和一个电介质材料层的多层晶片:一种用于在多层晶片的制造部件,包括下列步骤 (10)在第一和第二半导体材料层之间布置(8,9); 以及去除所述第一半导体材料层(9)最初由机械减薄所述第一半导体材料层(9),以便形成一个残余导电层(9“),并且随后通过化学方法除去残留的导电层(9”)。 在一个应用中,该多层晶片(8)结合到半导体材料的第一晶片(1),具有面向所述第一晶片的第二半导体材料层(21)(1),后微机电结构(37) havebeen形成在多层晶片的所述第二半导体材料层(21)。

    Semiconductor device having deep through vias
    4.
    发明公开
    Semiconductor device having deep through vias 有权
    在半导体器件中制造用于“深通孔”工艺

    公开(公告)号:EP2202791A3

    公开(公告)日:2011-04-13

    申请号:EP10160512.9

    申请日:2005-11-16

    Abstract: A semiconductor device includes a body (1) and, in the body (1): a semiconductor substrate (2), a semiconductor structural layer (10) and a dielectric layer (12) therebetween. A through interconnection via (30) traverses the body (1) and extends through the dielectric layer (12). The through interconnection via (30) has: a front-side interconnection region (17), including a portion of the structural layer (10) that extends between the dielectric layer (12) and a front face (10a) of the body (1) and is laterally insulated from the remainder of the structural layer (10); a back-side interconnection region (27), including a portion of the substrate (2) that extends between the dielectric layer (12) and a back face (2a) of the body (1) and is laterally insulated from the remainder of the substrate (2) by a back-side insulation trench (29). The back-side insulation trench (29) extends across the entire substrate (2; 102; 202), from the back face (2a) of the body (1) to the dielectric layer (12) the; and a conductive continuity region (8) connecting the front-side interconnection region (17) and the back-side interconnection region (27) through the dielectric layer (12).

    Method for manufacturing integrated structures including removing a sacrificial region
    7.
    发明公开
    Method for manufacturing integrated structures including removing a sacrificial region 失效
    用于制造包括去除牺牲区域的集成结构的方法

    公开(公告)号:EP0922944A2

    公开(公告)日:1999-06-16

    申请号:EP98830266.7

    申请日:1998-04-30

    Abstract: The method is based on the use of a silicon carbide mask for removing a sacrificial region. In case of manufacture of integrated semiconductor material structures, the following steps are performed: forming a sacrificial region (6) of silicon oxide on a substrate (1) of semiconductor material; growing a pseudo-epitaxial layer (8); forming an electronic circuit (10-13, 18); depositing a silicon carbide layer (21); defining photolithographycally the silicon carbon layer so as to form an etching mask (23) containing the topography of a microstructure (27) to be formed; with the etching mask (23), forming trenches (25) in the pseudo-epitaxial layer (8) as far as the sacrificial region (6) so as to laterally define the microstructure; and removing the sacrificial region (6) through the trenches (25).

    Abstract translation: 该方法基于使用碳化硅掩模去除牺牲区域。 在制造集成半导体材料结构的情况下,执行以下步骤:在半导体材料的衬底(1)上形成氧化硅的牺牲区域(6) 生长伪外延层(8); 形成电子电路(10-13,18); 沉积碳化硅层(21); 定义光刻硅碳层以形成包含待形成的微结构(27)的形貌的蚀刻掩模(23) 利用蚀刻掩模(23),在伪外延层(8)中形成直至牺牲区域(6)的沟槽(25)以横向地限定微结构; 并通过沟槽(25)去除牺牲区域(6)。

    Integrated angular speed sensor device and production method thereof
    8.
    发明公开
    Integrated angular speed sensor device and production method thereof 失效
    Integrierter Winkelgeschwindigkeitssensor und Verfahren zu seiner Herstellung

    公开(公告)号:EP0911606A1

    公开(公告)日:1999-04-28

    申请号:EP97830537.3

    申请日:1997-10-23

    Abstract: The angular speed sensor comprises a pair of mobile masses (2a, 2b) which are formed in the epitaxial layer (37) and are anchored to one another and to the remainder of the device by anchorage elements; the mobile masses are symmetrical with one another, and have mobile excitation electrodes (6a) which are intercalated with respective fixed excitation electrodes (7a 1 , 7a 2 ) and mobile detection electrodes (6b) which are intercalated with fixed detection electrodes (7b 1 , 7b 2 ). The mobile and fixed excitation electrodes extend in a first direction and the mobile and fixed detection electrodes extend in a second direction which is perpendicular to the first direction and is disposed on a single plane parallel to the surface of the device.

    Abstract translation: 角速度传感器包括一对移动质量块(2a,2b),它们形成在外延层(37)中,并通过锚定元件相互锚定并固定到装置的其余部分; 移动质量彼此对称,并且具有插入有固定的检测电极(7b1,7b2)的固定激励电极(7a1,7a2)和移动检测电极(6b)的移动激励电极(6a)。 移动和固定激励电极沿第一方向延伸,并且移动和固定检测电极在垂直于第一方向的第二方向上延伸并且设置在平行于装置表面的单个平面上。

    INTEGRATED PRESSURE SENSOR WITH DOUBLE MEASURING SCALE, PRESSURE MEASURING DEVICE INCLUDING THE INTEGRATED PRESSURE SENSOR, BRAKING SYSTEM, AND METHOD OF MEASURING A PRESSURE USING THE INTEGRATED PRESSURE SENSOR
    9.
    发明公开
    INTEGRATED PRESSURE SENSOR WITH DOUBLE MEASURING SCALE, PRESSURE MEASURING DEVICE INCLUDING THE INTEGRATED PRESSURE SENSOR, BRAKING SYSTEM, AND METHOD OF MEASURING A PRESSURE USING THE INTEGRATED PRESSURE SENSOR 审中-公开
    带双量表集成压力传感器,有集成压力传感器,制动系统和方法用于测量与集成压力传感器的压力压力测量装置

    公开(公告)号:EP3098584A1

    公开(公告)日:2016-11-30

    申请号:EP15200285.3

    申请日:2015-12-15

    CPC classification number: G01L9/0052 G01L9/0045 G01L9/0054 G01L15/00

    Abstract: A pressure sensor (15) with double measuring scale, comprising: a flexible body (16, 34) designed to undergo deflection as a function of a said pressure (P); piezoresistive transducers (28, 29; 94) for detecting the deflection; a first focusing region (30) designed to concentrate, during a first operating condition, a first value (P INT1 ) of said pressure (P) in a first portion (19) of the flexible body (16, 34) so as to generate a deflection of the first portion (19) of the flexible body (16, 34); and a second focusing region (33) designed to concentrate, during a second operating condition, a second value (P INT2 ) of said pressure (P) in a second portion (17) of the flexible body (16, 34) so as to generate a deflection of the second portion (17) of the flexible body (16, 34). The piezoresistive transducers correlate the deflection of the first portion (19) of the flexible body (16, 34) to the first pressure value (P INT1 ) and the deflection of the second portion (17) of the flexible body (16, 34) to the second pressure value (P INT2 ).

    Abstract translation: 的压力传感器(15)与双测量刻度,包括:柔性体(16,34)设计成经历偏转为所述压力(P)的函数; 压阻换能器(28,29; 94),用于检测所述偏转; 设计为浓缩物,在第一操作条件期间的第一聚焦区(30),在所述柔性主体(16,34)的第一部分(19)的第一值,所述压力的(P INT1)(P),以便产生 柔性主体(16,34)的第一部分(19)的偏转; 并设计成集中,第二操作条件期间的第二聚焦区(33),第二个值的所述压力的(P INT2)(P)在所述柔性主体的第二部分(17)(16,34),以便 生成柔性主体(16,34)的第二部分(17)的偏转。 压阻传感器的柔性主体(16,34)的第一压力值(P INT1)和柔性主体的第二部分(17)的偏转的第一部分(19)的偏转相关(16,34) 到第二压力值(P INT2)。

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