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1.
公开(公告)号:EP3944309A1
公开(公告)日:2022-01-26
申请号:EP21184890.8
申请日:2021-07-09
Applicant: STMicroelectronics S.r.l.
Inventor: STELLA, Cristiano Gianluca , RUSSO, Fabio
IPC: H01L23/485 , H01L23/492 , H01L23/495 , H01L23/373 , H01L23/433
Abstract: The HV MOSFET device has a body (35) integrating source conductive regions (37); projecting gate structures (46) above the body, laterally offset with respect to the source conductive regions (37); source contact regions (45), of a first metal, arranged on the body in electric contact with the source conductive regions (37); and source connection regions (48), of a second metal, arranged above the source contact regions (45) and having a height protruding with respect to the projecting gate structures (46). A package (59) includes a metal support (55) bonded to a second surface (35A) of the body; a dissipating region ,(32,57,72,73), above the first surface (35B) of the semiconductor die (31) and comprising a conductive plate (57) having a planar face (57A) bonded to the source connection regions (48) and spaced from the projecting gate structures; and a package mass (59) of dielectric material, between the support (55) and the dissipating region (32) and incorporating the semiconductor die (31). The dissipating region (32,57,72,73) is a DBC-type insulation multilayer (71) comprising the conductive plate (57), an intermediate insulating region (72), coupled to the conductive plate (57), and a top conductive region (73), coupled to the intermediate insulating region (72).
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2.
公开(公告)号:EP3896732A1
公开(公告)日:2021-10-20
申请号:EP21167688.7
申请日:2021-04-09
Applicant: STMicroelectronics S.r.l.
Inventor: STELLA, Cristiano Gianluca , COPPONE, Fabio Vito , SALAMONE, Francesco
IPC: H01L23/495 , H01L25/11 , H01L23/31 , H01L23/367 , H01L23/373 , H01L23/433
Abstract: The power device for surface mounting has a leadframe (15) including a die-attach support (24C) and at least one first lead (4B) and one second lead (4C). A die (6), of semiconductor material, is bonded to the die-attach support, and a package (2), of insulating material and parallelepipedal shape, surrounds the die and at least in part the die-attach support (24C) and has a package height (H1). The first and second leads (4B, 4C) have outer portions (14B, 14C) extending outside the package (2), from two opposite lateral surfaces (2C, 2D) of the package. The outer portions of the leads have lead heights (H2) greater than the package height (H1), extend throughout the height of the package, and have respective portions projecting from the first base (2A).
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3.
公开(公告)号:EP4020547A2
公开(公告)日:2022-06-29
申请号:EP21215266.4
申请日:2021-12-16
Applicant: STMicroelectronics S.r.l.
Inventor: STELLA, Cristiano Gianluca , RIZZA, Roberto
IPC: H01L23/492 , H01L23/495
Abstract: The packaged power electronic device (1) has a bearing structure (15) including a base section (16) and a transverse section (17) extending transversely to the base section. A die (2) is bonded to the base section of the bearing structure and has a first terminal (11) on a first main face (2A) and a second and a third terminal (12, 13) on a second main face (2B). A package (5) of insulating material embeds the semiconductor die (2), the second terminal (12), the third terminal (13) and at least partially the carrying base (16). A first, a second and a third outer connection region (36, 31, 33) are electrically coupled to the first, the second and the third terminals of the die, respectively, are laterally surrounded by the package and face the second main surface (5B) of the package. The transverse section (17) of the bearing structure extends from the base section (16) towards the second main surface of the package and has a higher height with respect to the die.
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4.
公开(公告)号:EP4020547A3
公开(公告)日:2022-07-06
申请号:EP21215266.4
申请日:2021-12-16
Applicant: STMicroelectronics S.r.l.
Inventor: STELLA, Cristiano Gianluca , RIZZA, Roberto
IPC: H01L23/492 , H01L23/495
Abstract: The packaged power electronic device (1) has a bearing structure (15) including a base section (16) and a transverse section (17) extending transversely to the base section. A die (2) is bonded to the base section of the bearing structure and has a first terminal (11) on a first main face (2A) and a second and a third terminal (12, 13) on a second main face (2B). A package (5) of insulating material embeds the semiconductor die (2), the second terminal (12), the third terminal (13) and at least partially the carrying base (16). A first, a second and a third outer connection region (36, 31, 33) are electrically coupled to the first, the second and the third terminals of the die, respectively, are laterally surrounded by the package and face the second main surface (5B) of the package. The transverse section (17) of the bearing structure extends from the base section (16) towards the second main surface of the package and has a higher height with respect to the die.
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公开(公告)号:EP4273925A1
公开(公告)日:2023-11-08
申请号:EP23165027.6
申请日:2023-03-29
Applicant: STMicroelectronics S.r.l.
Inventor: STELLA, Cristiano Gianluca , MINOTTI, Agatino , SALAMONE, Francesco
IPC: H01L23/538 , H01L23/373 , H01L25/07 , H01L23/367
Abstract: Electronic device (50) comprising at least a first and a second branch (21A, 21B, 21C), each branch including a first and a second transistor (23, 24) arranged in series to each other and formed in respective dice (51) of semiconductor material. The dice (51) are sandwiched between a first substrate element (55) and a second substrate element (56). The first and the second substrate elements (55, 56) are formed each by a multilayer including a first conductive layer (57), a second conductive layer (58) and an insulating layer (59) extending between the first and the second conductive layers. The first conductive layers (57) of the first and the second substrate elements (55, 56) face towards the outside of the electronic device and define a first and a second main face of the electronic device. The second conductive layer (58) of the first and the second substrate elements (55, 56) is shaped so as to form contact regions (52A-52F, 33A-33D) facing and in selective electrical contact with the plurality of dice (51).
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6.
公开(公告)号:EP3780100A1
公开(公告)日:2021-02-17
申请号:EP20188729.6
申请日:2020-07-30
Applicant: STMicroelectronics S.r.l.
Inventor: STELLA, Cristiano Gianluca , SALAMONE, Francesco
IPC: H01L25/07 , H01L23/538 , H01L23/373 , H01L23/488 , H01L21/98 , H01L21/60 , H01L23/495 , H01L23/31
Abstract: A packaged power electronic device (50, 150) comprises: a first support element (56) having a first and a second face (56', 56"), the first face (56') of the first support element forming a first thermal dissipation surface (50A, 150A) of the device (50, 150); a second support element (57) having a first and a second face (57', 57"), the first face (57') of the second support element (57) forming a second thermal dissipation surface (50B, 150B) of the device (50, 150), the first and the second support elements (56, 57) being superimposed to each other with the respective second faces (56", 57") facing each other; a first, a second, a third and a fourth power component (51-54) (e.g., power transistors), the first and third power components (51, 53) being attached to the second face (57") of the second support element (57), the second and the fourth power components (52, 54) being attached to the second face (56") of the first support element (56); a first contacting element (60) superimposed and in electric contact with the second and the fourth power components (51, 53); a second contacting element (80) superimposed and in electric contact with the first power component (51); a third contacting element (81) superimposed and in electric contact with the third power component (54); a plurality of leads (59A-59H, 77A-77F) electrically coupled with the power components (51-54) through the first and/or the second support elements (56, 57); a thermally conductive body (93, 94) (e.g., a block of conductive material (94), such as copper, or an adhesive mass (93), such as solder) arranged between the first, the second and the third contacting elements (60, 80, 81); the second and the third contacting elements (80, 81) being arranged side by side and electrically insulated from each other; wherein the first and the second support elements (56, 57) and the first, the second and third contacting elements (60, 80, 81) are formed by electrically insulating and thermally conductive multilayers, e.g. direct bonded copper (DBC). The first, second and third contacting elements (60, 80, 81) may have a first and a second dimension that are greater than a depth dimension, the second and third contacting elements (80, 81) being adjacent to each other on a side extending along the first dimension (X) and being offset with respect to the first contacting element (60) along the second direction (Y) and optionally also in the first direction (X). The first, second, third and fourth power components (51-54) may be electrically connected to form a full-bridge. First conductive layers (80A, 81A) of the second and the third contacting elements (80, 81) may be coupled to conductive regions (58H, 58G) of the first support element (56) through a first and, respectively, a second connection pillar element (67, 68) of conductive material. The device (50, 150) may further comprise a first and a second clip element (82, 83) of electrically conductive material, the first clip element (82) extending between the first conductive layer (80A) of the second contacting element (80) and the first power component (51) and the second clip element (83) extending between the first conductive layer (81A) of the third contacting element (81) and the third power component (53), the first and the second clip elements (82, 83) having a respective projecting portion extending beyond the first and, respectively, the third power component (51, 53) and being electrically coupled at the respective projecting portion to the first and respectively the second connection pillar element (67, 68). The second and the third contacting elements (80, 81) may be longer than the first and the third power components (51, 53) and coupled at one own projecting portion to the first and respectively the second connection pillar element (67, 68). A first and a second supporting pillar portions (85) may extend between a respective projecting portion and the second support element (57) aligned with the first and, respectively, the second connection pillar elements (67, 68), the first and the second supporting pillar portions (85) being formed each by an electrically insulating and thermally conductive multilayer, e.g. DBC, and forming, with the respective first and second connection pillar elements (67, 68), a first and a second alignment and spacing structure (89). The first and the second support elements (56, 57) may further have an elongated shape with a first and a second longitudinal end, wherein the first and second alignment and spacing structures (89) are arranged in proximity to the first longitudinal end of the first and the second support elements (56, 57), the device (50, 150) comprising a third and a fourth alignment and spacing structures (90) extending in proximity to the second longitudinal end of the first and the second support elements (56, 57), wherein the third alignment and spacing structure (90) comprises a third supporting pillar portion (92) and a first supporting pillar element (91) aligned with each other and the fourth alignment and spacing structure (90) comprises a fourth supporting pillar portion (92) and a second supporting pillar element (91) aligned with each other, the third and the fourth supporting pillar portions (92) being formed each by an electrically insulating multilayer, e.g., DBC, the first and the second supporting pillar elements (91) being of conductive material. The first, second and third contacting element (60, 80, 81) and the thermally conductive body (93, 94) may form a thermal distribution structure (95), assembled before bonding with the power components (51-54).
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公开(公告)号:EP3561867A1
公开(公告)日:2019-10-30
申请号:EP19165579.4
申请日:2019-03-27
Applicant: STMicroelectronics S.r.l.
Inventor: STELLA, Cristiano Gianluca , MINOTTI, Agatino
IPC: H01L23/495 , H01L23/373 , H01L23/433 , H01L23/31 , H01L23/528
Abstract: A power semiconductor device (2) including: a first die (6) and a second die (106), each of which includes a plurality of conductive contact regions (12) and a passivation region (13), which includes a number of projecting dielectric regions (10') and a number of windows (18, 118), adjacent windows being separated by a corresponding projecting dielectric region, each conductive contact region being arranged within a corresponding window; and a package (1) of the surface mount type, housing the first and second dice.
The package includes: a first bottom insulation multilayer (26) and a second bottom insulation multilayer (126), which carry, respectively, the first and second dice; and a covering metal layer (16b), arranged on top of the first and second dice and including projecting metal regions (36), which extend into the windows so as to couple electrically with corresponding conductive contact regions. The covering metal layer moreover forms a number of cavities (40), which are interposed between the projecting metal regions so as to overlie corresponding projecting dielectric regions.
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