公开(公告)号：EP4005972A1

公开(公告)日：2022-06-01

申请号：EP21211139.7

申请日：2021-11-29

Applicant: STMicroelectronics S.r.l. ,  STMicroelectronics International N.V.

Inventor： DUQI, Enri ,  BALDO, Lorenzo ,  FERRARI, Paolo ,  VIGNA, Benedetto ,  VILLA, Flavio Francesco ,  CASTOLDI, Laura Maria ,  GELMI, Ilaria

IPC: B81C1/00 ,  H04R1/08

Abstract: A semiconductor device includes: a substrate (2); a transduction microstructure (3) integrated in the substrate (2); a cap (5) joined to the substrate (2) and having a first face (5a) adjacent to the substrate (2) and a second, outer, face (5b); and a channel (15) extending through the cap (5) from the second face (5b) to the first face (5a) and communicating with the transduction microstructure (3). A protective membrane (17) made of porous polycrystalline silicon permeable to aeriform substances is set across the channel (15).

公开(公告)号：WO2011015637A1

公开(公告)日：2011-02-10

申请号：PCT/EP2010/061441

申请日：2010-08-05

Applicant: STMICROELECTRONICS S.R.L. ,  CORONA, Pietro ,  LOSA, Stefano ,  GELMI, Ilaria ,  CAMPEDELLI, Roberto

Inventor： CORONA, Pietro ,  LOSA, Stefano ,  GELMI, Ilaria ,  CAMPEDELLI, Roberto

IPC: B81C1/00

CPC classification number: B81C1/00476 ,  B81B2201/0264 ,  B81B2203/0109 ,  B81B2203/0127 ,  B81C1/00047 ,  B81C2201/0109

Abstract: A process for manufacturing a MEMS device, wherein a bottom silicon region (4b) is formed on a substrate and on an insulating layer (3); a sacrificial region (5a) of dielectric is formed on the bottom region; a membrane region (21), of semiconductor material, is epitaxially grown on the sacrificial region; the membrane region is dug as far as the sacrificial region so as to form through trenches (15); the side wall and the bottom of the through trenches are completely coated in a conformal way with a porous material layer (16); at least one portion of the sacrificial region is selectively removed through the porous material layer and forms a cavity (18); and the through trenches are filled with filling material (20a) so as to form a monolithic membrane suspended above the cavity (18).

Abstract translation: 一种用于制造MEMS器件的方法，其中底部硅区域（4b）形成在衬底上和绝缘层（3）上; 电介质的牺牲区（5a）形成在底部区域上; 半导体材料的膜区域（21）在牺牲区域上外延生长; 将膜区域挖到远离牺牲区域以形成通过沟槽（15）; 通过沟槽的侧壁和底部以保形方式与多孔材料层（16）完全涂覆; 牺牲区域的至少一部分被选择性地通过多孔材料层去除并形成空腔（18）; 并且通孔填充有填充材料（20a），以便形成悬浮在空腔（18）上方的整体膜。

公开(公告)号：EP4520716A1

公开(公告)日：2025-03-12

申请号：EP24195132.6

申请日：2024-08-19

Applicant: STMicroelectronics International N.V.

Inventor： NOMELLINI, Andrea ,  GELMI, Ilaria ,  CAPRA, Federica ,  VIMERCATI, Michele ,  LAMAGNA, Luca

IPC: B81B3/00

Abstract: A process for manufacturing a microelectromechanical device (10) includes: on a body (13) containing semiconductor material, forming a sacrificial layer (18) of dielectric material having a first surface (18a), opposite to the body (13); conferring a sacrificial surface roughness to the first surface (18a) of the sacrificial layer (18); on the first surface (18a) of the sacrificial layer (18), forming a structural layer (112) of semiconductor material having a second surface (112a) in contact with the first surface (18a) of the sacrificial layer (18). Conferring sacrificial surface roughness to the first surface (18a) of the sacrificial layer (18) includes: on the sacrificial layer (18), forming a transfer layer (19) of semiconductor material with intrinsic porosity; and partially removing the sacrificial layer (18) through the transfer layer (19).

公开(公告)号：EP3912953A1

公开(公告)日：2021-11-24

申请号：EP21174844.7

申请日：2021-05-19

Applicant: STMicroelectronics S.r.l.

Inventor： ALLEGATO, Giorgio ,  CORSO, Lorenzo ,  GELMI, Ilaria ,  VALZASINA, Carlo

IPC: B81B7/02

Abstract: Process for manufacturing a MEMS device (30), wherein a first structural layer (41) of a first thickness is formed on a substrate (31); first trenches (58) are formed through the first structural layer (41); masking regions (60') separated by first openings (62) are formed on the first structural layer; a second structural layer (42) of a second thickness is formed on the first structural layer (41) in direct contact with the first structural layer (41) at the first openings (62) and forms here, together with the first structural layer, thick structural regions (64) having a third thickness equal to the sum of the first and the second thicknesses; a plurality of second trenches (67) are formed through the second structural layer (42), over the masking regions (60'); and third trenches (68) are formed through the first and the second structural layers (41, 42) by removing selective portions of the thick structural regions (64) .