公开(公告)号：AU2003299866A8

公开(公告)日：2004-09-28

申请号：AU2003299866

申请日：2003-12-24

Applicant: TESSERA INC

Inventor： BEROZ MASUD ,  KUBOTA YOICHI ,  KANG TECK-GYU ,  WARNER MICHAEL ,  URBISH GLENN ,  PARK JAE M ,  SMITH LEE

IPC: H01L23/498 ,  H01L25/065 ,  H01L23/02 ,  H01L23/28 ,  H01L23/34 ,  H01L23/52 ,  H01L29/40 ,  H01L39/00

公开(公告)号：AU2003299866A1

公开(公告)日：2004-09-28

申请号：AU2003299866

申请日：2003-12-24

Applicant: TESSERA INC

Inventor： BEROZ MASUD ,  WARNER MICHAEL ,  SMITH LEE ,  URBISH GLENN ,  KANG TECK-GYU ,  PARK JAE M ,  KUBOTA YOICHI

IPC: H01L23/498 ,  H01L25/065

公开(公告)号：AU2003265417A1

公开(公告)日：2004-03-03

申请号：AU2003265417

申请日：2003-08-13

Applicant: TESSERA INC

Inventor： BANG KYONG-MO ,  KANG TECK-GYU ,  PARK JAE M

IPC: H01L23/31 ,  H01L23/498 ,  H01L23/544 ,  H01L25/10 ,  H01L21/60

公开(公告)号：WO2005065424A3

公开(公告)日：2006-07-20

申请号：PCT/US2004044088

申请日：2004-12-21

Applicant: TESSERA INC ,  HABA BELGACEM ,  BEROZ MASUD ,  HUMPSTON GILES ,  PARK JAE M

Inventor： HABA BELGACEM ,  BEROZ MASUD ,  HUMPSTON GILES ,  PARK JAE M

IPC: H01R13/62 ,  H01L21/48 ,  H01L23/13 ,  H01R13/24

CPC classification number: H01L23/13 ,  H01L21/4846 ,  H01L2924/0002 ,  H01R13/2414 ,  H01R13/2464 ,  H01L2924/00

Abstract: A microelectronic package includes a mounting structure (136), a microelectronic element associated with the mounting structure, and a plurality of conductive posts (146) physically connected to the mounting structure and electrically connected to the microelectronic element. The conductive posts (146) project from the mounting structure (136) in an upward direction (Z), at least one of the conductive posts being an offset post. Each offset post has a base (154) connected to the mounting structure (136), the base of each offset post defining a centroid (156). Each offset post also defines an upper extremity (178) having a centroid (160), the centroid of the upper extremity being offset from the centroid (156) of the base (154) in a horizontal offset direction transverse to the upward direction (Z). The mounting structure (136) is adapted to permit tilting of each offset post about a horizontal axis so that the upper extremities (178) may wipe across a contact pad of an opposing circuit board.

Abstract translation: 微电子封装包括安装结构（136），与安装结构相关联的微电子元件以及物理连接到安装结构并电连接到微电子元件的多个导电柱（146）。 导电柱（146）从安装结构（136）沿向上的方向（Z）突出，至少一个导电柱是偏移柱。 每个偏移柱具有连接到安装结构（136）的基部（154），每个偏移柱的基部限定重心（156）。 每个偏移柱还限定具有质心（160）的上端（178），上端的质心在垂直于向上方向（Z）的水平偏移方向上偏离基座（154）的重心（156） ）。 安装结构（136）适于允许每个偏移柱绕水平轴线倾斜，使得上端（178）可以擦拭相对电路板的接触垫。

公开(公告)号：WO2004080134A3

公开(公告)日：2005-01-27

申请号：PCT/US0341132

申请日：2003-12-24

Applicant: TESSERA INC

Inventor： BEROZ MASUD ,  WARNER MICHAEL ,  SMITH LEE ,  URBISH GLENN ,  KANG TECK-GYU ,  PARK JAE M ,  KUBOTA YOICHI

IPC: H01L23/498 ,  H01L25/065 ,  H01L23/02 ,  H01L23/28 ,  H01L23/34 ,  H01L23/52 ,  H01L29/40 ,  H01L39/00

CPC classification number: H01L25/0657 ,  H01L23/49861 ,  H01L24/48 ,  H01L25/0652 ,  H01L2224/05599 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/73253 ,  H01L2224/85399 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06541 ,  H01L2225/06551 ,  H01L2225/06572 ,  H01L2225/06579 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00012

Abstract: A radio frequency chip package is formed by assembling a connecting element such as a circuit board (52) or flexible circuit tape having chips (72, 84) thereon with a bottom plane element (20) such as a lead frame incorporating a large thermally-conductive plate (22) and leads (40, 42) projecting upwardly from the plane of the plate. The assembly step places the rear surfaces (78) of the chips (72) on the bottom side of the connecting element (52) into proximity with the thermal conductor (22) and joins the conductive traces (60) on the connecting element with the leads. The resulting assembly is encapsulated, leaving terminals at the bottom ends (45) of the leads exposed. The encapsulated assembly may be surface-mounted to a circuit board (102). The leads (40, 42) provide robust electrical connections between the connecting element (52) and the circuit board (102).

Abstract translation: 通过将诸如电路板（52）的连接元件或其上具有芯片（72,84）的柔性电路带组装在诸如引线框架的底平面元件（20）上而形成射频芯片封装， 导电板（22）和从板的平面向上突出的引线（40,42）。 组装步骤将芯片（72）的后表面（78）放置在连接元件（52）的底侧上，接近热导体（22），并将连接元件上的导电迹线（60）与 线索。 所得的组件被封装，导致引线的底端（45）露出。 封装的组件可以表面安装到电路板（102）。 引线（40,42）在连接元件（52）和电路板（102）之间提供牢固的电连接。

公开(公告)号：WO2005107345A3

公开(公告)日：2006-12-28

申请号：PCT/US2005013699

申请日：2005-04-21

Applicant: TESSERA INC ,  BEROZ MASUD ,  PARK JAE M ,  HABA BELGACEM ,  TAN FION ,  OSBORN PHILIP R

Inventor： BEROZ MASUD ,  PARK JAE M ,  HABA BELGACEM ,  TAN FION ,  OSBORN PHILIP R

IPC: H01R43/00 ,  H01L21/60 ,  H01L23/13 ,  H01L23/31 ,  H01L23/48 ,  H01L23/495 ,  H01L23/498 ,  H01L23/50 ,  H01L23/52 ,  H01R9/00 ,  H01R12/04 ,  H05K1/11

CPC classification number: H01L23/13 ,  H01L23/3114 ,  H01L23/4951 ,  H01L23/4952 ,  H01L23/49811 ,  H01L23/49816 ,  H01L24/48 ,  H01L24/85 ,  H01L2224/05647 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/4824 ,  H01L2224/48463 ,  H01L2224/48471 ,  H01L2224/85447 ,  H01L2924/00014 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/19107 ,  H01L2224/45099 ,  H01L2924/00

Abstract: A connection component (100) for a semiconductor chip includes a substrate (102) having a gap (106) over which extends a plurality of parallel spaced apart leads (120). The ends of the leads (120) are adhered to the substrate either by being bonded to contacts or being embedded in the substrate. The connection component can be formed, in one embodiment, by stitch bonding wire leads (120) across the gap (106). In another embodiment, a prefabricated lead assembly supporting spaced apart parallel leads (120) is juxtaposed and transferred to the substrate (102). The connection component is juxtaposed overlying a semiconductor chip whereby leads extending over the gap (106) may have one end detached and bonded to an underlying chip contact.

Abstract translation: 用于半导体芯片的连接部件（100）包括具有间隙（106）的基板（102），多个平行间隔开的​​引线（120）延伸穿过该间隙。 引线（120）的端部通过结合到触点或嵌入基板中而粘附到基板上。 在一个实施例中，连接部件可以通过跨过间隙（106）的引线（120）进行缝合而形成。 在另一个实施例中，支撑间隔开的平行引线（120）的预制引线组件并置并转移到衬底（102）。 连接部件并置在半导体芯片上，由此在间隙（106）上延伸的引线可以具有一端分离并结合到下面的芯片触点。

公开(公告)号：WO2008112318A3

公开(公告)日：2008-11-13

申请号：PCT/US2008003473

申请日：2008-03-13

Applicant: TESSERA INC ,  HABA BELGACEM ,  KUBOTA YOICHI ,  KANG TECK-GYU ,  PARK JAE M

Inventor： HABA BELGACEM ,  KUBOTA YOICHI ,  KANG TECK-GYU ,  PARK JAE M

IPC: H05K1/11 ,  H01L23/48

CPC classification number: H01L24/14 ,  H01L21/4828 ,  H01L21/4853 ,  H01L21/563 ,  H01L23/49811 ,  H01L24/11 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/13099 ,  H01L2224/16225 ,  H01L2224/73203 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01084 ,  H01L2924/01322 ,  H01L2924/014 ,  H05K3/061 ,  H05K3/4007 ,  H05K2201/0367 ,  H05K2203/0369 ,  H05K2203/0597 ,  H05K2203/1476 ,  Y10T29/49126 ,  Y10T428/24174 ,  H01L2224/05599

Abstract: A method includes applying a final etch-resistant material 34 to an in-process substrate 10 so that the final etch-resistant material 34 at least partially covers first microcontact portions 32 integral with the substrate 10 and projecting upwardly from a surface 18 of the substrate, and etching the surface of the substrate 10 so as to leave second microcontact portions 36 below the first microcontact portions 32 and integral therewith, the final etch-resistant material 34 at least partially protecting the first microcontact portions 32 from etching during the further etching step. A microelectronic unit includes a substrate 10, and a plurality of microcontacts 38 projecting in a vertical direction from the substrate 10, each microcontact 38 including a base region 42 adjacent the substrate and a tip region 32 remote from the substrate, each microcontact 38 having a horizontal dimension which is a first function of vertical location in the base region 42 and which is a second function of vertical location in the tip region 32.

Abstract translation: 一种方法包括将最终的耐蚀刻材料34施加到工艺衬底10，使得最终抗蚀刻材料34至少部分地覆盖与衬底10成一体并从衬底的表面18向上突出的第一微接触部分32 并且蚀刻衬底10的表面以便将第二微接触部分36留在第一微接触部分32下方并与之成一体，最终抗蚀刻材料34在另外的蚀刻步骤期间至少部分地保护第一微接触部分32免受蚀刻 。 微电子单元包括衬底10和从衬底10沿垂直方向突出的多个微接点38，每个微接触器38包括邻近衬底的基极区域42和远离衬底的尖端区域32，每个微接触器38具有 水平尺寸是基部区域42中的垂直位置的第一函数，并且其是尖端区域32中的垂直位置的第二函数。

公开(公告)号：WO2008066894A3

公开(公告)日：2008-08-14

申请号：PCT/US2007024589

申请日：2007-11-28

Applicant: TESSERA INC ,  KANG TECK-GYU ,  PARK JAE M ,  KUBOTA YOICHI

Inventor： KANG TECK-GYU ,  PARK JAE M ,  KUBOTA YOICHI

IPC: H01L23/498 ,  H01L23/057

CPC classification number: H01L23/4985 ,  B81B7/007 ,  B81B2207/097 ,  H01L23/057 ,  H01L23/49861 ,  H01L24/48 ,  H01L27/14678 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/16195 ,  H01L2924/3025 ,  H05K1/118 ,  H05K1/189 ,  H05K2201/0361 ,  H05K2201/0367 ,  H05K2201/2009 ,  H05K2203/0169 ,  H05K2203/1327 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: Substrates (240) having integrated rigid (236) and flexible regions (234) and methods of fabricating such substrates (240) are disclosed. The substrates may- advantageous Iy be used for mounting semiconductor chips used in flexible microelectronic assemblies.

Abstract translation: 公开了具有集成的刚性（236）和柔性区（234）的衬底（240）和制造这种衬底（240）的方法。 基板可以有利地用于安装用于柔性微电子组件的半导体芯片。