公开(公告)号：JP2001044160A

公开(公告)日：2001-02-16

申请号：JP19966899

申请日：1999-07-13

Applicant: UNITED MICROELECTRONICS CORP

Inventor： CHIN TOIKU ,  RYU SHIKEN ,  SHO KENTATSU ,  YO KENRIN

IPC: B08B3/12 ,  B08B7/00 ,  G03F7/42 ,  H01L21/027 ,  H01L21/304 ,  H01L21/306

Abstract: PROBLEM TO BE SOLVED: To provide a method for cleaning the surface of a low dielectric constant material. SOLUTION: A substantially large part of a photoresist layer on a low dielectric constant organic material layer 102 is removed by a plasma108 containing nitrogen atoms, and thereafter an oxynitride silicon layer is formed on an exposed surface of the organic material layer. A resilient photoresist layer 106a of a plasma process is made to swell in a solvent 112. Then an oxygen plasma 114 is used to remove the swelled resilient photoresist layer. When the laminate is cleaned with the oxygen plasma, an oxynitride thin film 110 is formed on the organic material layer. Through the protection of the oxygennitride silicon layer, distortion of a cross-sectional shape of the organic material layer is prevented.

公开(公告)号：JP2001135592A

公开(公告)日：2001-05-18

申请号：JP31064499

申请日：1999-11-01

Applicant: UNITED MICROELECTRONICS CORP

Inventor： SAI SEIGEN ,  RYU SHIKEN ,  WU JUAN-YUAN

IPC: H01L21/28 ,  H01L21/316 ,  H01L21/768 ,  H01L23/522

Abstract: PROBLEM TO BE SOLVED: To provide a method of manufacturing a dual damascene. SOLUTION: Prior to forming of fluorinated silicate glass(FSG) layers 210a, 218a functioning as an inter-metal dielectric(IMD) layer on a semiconductor substrate 200, undoped silicate glass(USG) liners 208a, 216a are formed to thereby solve the question about the surface dependence and obtain an FSG layer having a good thickness uniformity and a high reliability. The USG liners improve the adhesion between the FSG layer and other material layer and reduce the particle growth ratio.

公开(公告)号：JP2000332015A

公开(公告)日：2000-11-30

申请号：JP13164499

申请日：1999-05-12

Applicant: UNITED MICROELECTRONICS CORP

Inventor： RYU SHIKEN ,  O KONCHI ,  SHA BUNEKI ,  KO MASUTAMI

IPC: H01L21/3205 ,  H01L23/52

Abstract: PROBLEM TO BE SOLVED: To prevent flaking of a silicon-rich nitride(SRN) layer from a copper layer and the resulting diffusion of copper by causing dangling-bonded silicon within the SRN layer to react with the copper layer, to thereby form copper silicide between the SRN and copper layers. SOLUTION: A silicon rich nitride layer 212 is formed on a dielectric layer 202 by a plasma CVD method, using an evaporation gases, such as silane and ammonium. By adjusting the percentage of flow rate of silane to ammonium, the layer 212 results in containing more silicon component than nitrogen component. Since the layer 212 has a large number of Si-H dangling bonds therein, Si-H bonds react with copper, thereby forming a copper silicide layer 214 between the exposed copper layers 210b and 210c and the layer 212 and improving their adhesion. Therefore, the layer 212 will not exfoliate from copper due to stresses caused at its interface.

公开(公告)号：JP2001156056A

公开(公告)日：2001-06-08

申请号：JP33166599

申请日：1999-11-22

Applicant: UNITED MICROELECTRONICS CORP

Inventor： RYU SHIKEN ,  SAI SEIGEN ,  SHA BUNEKI

IPC: H01L21/31 ,  C23C16/50 ,  H01L21/205 ,  H05H1/46

Abstract: PROBLEM TO BE SOLVED: To provide an apparatus for preventing plasma-induced damages to a wafer. SOLUTION: This apparatus is suited for use with a plasma deposition apparatus for forming dielectric layers. The invented apparatus comprises a screen grid 302 having a region slightly greater than the region size of the wafer 300 under processing, the screen grid 302 is disposed just above the wafer, and a negative bias is applied to the screen grid in the initial stage of a process of forming the dielectric layer, thereby filtering positive ions of the plasma in the deposition apparatus. In the initial stage of a plasma deposition process, an electron flat gun 304 neutralizes electric charges on the wafer to form a non-plasma-ion-damage liner layer on the wafer surface before surely depositing the dielectric layer.

公开(公告)号：JP2001127063A

公开(公告)日：2001-05-11

申请号：JP30267499

申请日：1999-10-25

Applicant: UNITED MICROELECTRONICS CORP

Inventor： SAI SEIGEN ,  RYU SHIKEN ,  WU JUAN-YUAN

IPC: H01L21/3205 ,  H01L21/318 ,  H01L23/52

Abstract: PROBLEM TO BE SOLVED: To provide a method of increasing the adhesion between copper and silicon nitride. SOLUTION: First, a substrate coated with a dielectric layer is prepared. Then, a copper layer is formed on the dielectric layer and a copper phosphide intermediate layer is formed on the copper layer by a PECVD method and then a silicon nitride layer is formed on the copper phosphide intermediate layer. All the copper oxide layers appearing on the surface of the copper layer are turned into a copper phosphide intermediate layer. The copper phosphide intermediate layer has a lower resistance than a copper oxide and has an excellent property of effectively preventing the diffusion of copper into the dielectric layer surrounding copper.

公开(公告)号：JP2000174118A

公开(公告)日：2000-06-23

申请号：JP34588098

申请日：1998-12-04

Applicant: UNITED MICROELECTRONICS CORP

Inventor： KO EKIMIN ,  RYU SHIKEN ,  YEW TRI-RUNG

IPC: H01L21/768

Abstract: PROBLEM TO BE SOLVED: To provide an improved method of forming an intermetallic interconnection to avoid damaging an IMD layer during forming a plasma reinforced oxide layer. SOLUTION: A dielectric layer 202 having metal plugs 203 in a substrate 200 is formed on the substrate 200, an IMD layer 204 is formed on the dielectric layer 202, an insulation layer 208 and a plasma reinforced oxide layer 210 are formed on the IMD layer 204, the photolithography and the etching process are applied to form trenches 214 in the IMD layer 204 and expose the metal plugs 203 of the dielectric layer 202, and the trenches 214 are filled with a metal 216a to electrically connect to the metal plugs 203.