公开(公告)号：US20150217996A1

公开(公告)日：2015-08-06

申请号：US14685309

申请日：2015-04-13

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chia-Hua Chu ,  Chun-Wen Cheng ,  Jiou-Kang Lee ,  Kai-Chih Liang ,  Chung-Hsien Lin ,  Te-Hao Lee

IPC: B81C1/00

CPC classification number: B81C1/00269 ,  B81B2201/0235 ,  B81B2201/0242 ,  B81B2201/0257 ,  B81B2203/0307 ,  B81B2207/012 ,  B81C1/00039 ,  B81C1/00261 ,  B81C2203/035

Abstract: Exemplary microelectromechanical system (MEMS) devices, and methods for fabricating such are disclosed. An exemplary method includes providing a silicon-on-insulator (SOI) substrate, wherein the SOI substrate includes a first silicon layer separated from a second silicon layer by an insulator layer; processing the first silicon layer to form a first structure layer of a MEMS device; bonding the first structure layer to a substrate; and processing the second silicon layer to form a second structure layer of the MEMS device.

Abstract translation: 公开了示例性微机电系统（MEMS）装置及其制造方法。 一种示例性方法包括提供绝缘体上硅（SOI）衬底，其中SOI衬底包括通过绝缘体层与第二硅层分离的第一硅层; 处理所述第一硅层以形成MEMS器件的第一结构层; 将第一结构层接合到基板上; 以及处理所述第二硅层以形成所述MEMS器件的第二结构层。

公开(公告)号：US09085455B2

公开(公告)日：2015-07-21

申请号：US13893058

申请日：2013-05-13

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chun-Wen Cheng ,  Chia-Hua Chu

IPC: B81C3/00 ,  B81B7/00

CPC classification number: B81B7/04 ,  B81B7/0032 ,  B81B7/02 ,  B81B2201/0235 ,  B81B2201/0242 ,  B81B2201/0257 ,  B81B2201/0264 ,  B81C1/00293 ,  B81C1/00309 ,  B81C3/001 ,  B81C2203/0118

Abstract: Embodiments of the present disclosure include MEMS devices and methods for forming MEMS devices. An embodiment is a method for forming a microelectromechanical system (MEMS) device, the method including forming a MEMS wafer having a first cavity, the first cavity having a first pressure, and bonding a carrier wafer to a first side of the MEMS wafer, the bonding forming a second cavity, the second cavity having a second pressure, the second pressure being greater than the first pressure. The method further includes bonding a cap wafer to a second side of the MEMS wafer, the second side being opposite the first side, the bonding forming a third cavity, the third cavity having a third pressure, the third pressure being greater than the first pressure and less than the second pressure.

Abstract translation: 本公开的实施例包括MEMS器件和用于形成MEMS器件的方法。 一个实施例是用于形成微机电系统（MEMS）装置的方法，该方法包括形成具有第一腔的MEMS晶片，第一腔具有第一压力，并将载体晶片接合到MEMS晶片的第一侧， 接合形成第二腔，所述第二腔具有第二压力，所述第二压力大于所述第一压力。 该方法还包括将盖晶片接合到MEMS晶片的第二侧，第二侧与第一侧相对，接合形成第三腔，第三腔具有第三压力，第三压力大于第一压力 并且小于第二压力。

公开(公告)号：US20150192602A1

公开(公告)日：2015-07-09

申请号：US14660353

申请日：2015-03-17

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Shigehiro Yoshiuchi ,  Satoshi Ohuchi ,  Tsuyoshi Fujii ,  Kensaku Yamamoto ,  Hideo Ohkoshi

IPC: G01P15/08

CPC classification number: G01C19/5769 ,  B81B7/0048 ,  B81B2201/0242 ,  B81B2201/025 ,  B81B2203/0118 ,  B81B2203/0315 ,  B81B2207/07 ,  B81C1/0023 ,  B81C1/00238 ,  G01P15/0802 ,  H01L24/32 ,  H01L41/1132 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/06506 ,  H01L2924/01014 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/00014

Abstract: An inertial force sensor that can suppress fluctuation of detection sensitivity even if an external stress is applied to the inertial force sensor. Angular velocity sensor (1), that is, an inertial force sensor includes ceramic substrate (6), lower lid (4) adhering to ceramic substrate (6) with adhesives (11a and 11b) (first adhesives), and sensor element (2) adhering to lower lid (4) with adhesives (10a and 10b) (second adhesives). The elastic moduli of adhesives (11a and 11b) are smaller than those of adhesives (10a and 10b).

Abstract translation: 即使向惯性力传感器施加外部应力也能够抑制检测灵敏度的波动的惯性力传感器。 角速度传感器（1）即惯性力传感器包括陶瓷基板（6），粘合剂（11a和11b）（第一粘合剂）和传感器元件（2）附着在陶瓷基板（6）上的下盖 ）用粘合剂（10a和10b）（第二粘合剂）粘附到下盖（4）上。 粘合剂（11a和11b）的弹性模量小于粘合剂（10a和10b）的弹性模量。

公开(公告)号：US20150191349A1

公开(公告)日：2015-07-09

申请号：US14414333

申请日：2012-07-11

Applicant: Jennifer Wu ,  Zhuqing Zhang ,  Wallace Andrew Dingman

Inventor： Jennifer Wu ,  Zhuqing Zhang ,  Wallace Andrew Dingman

IPC: B81C1/00 ,  B81B7/00

CPC classification number: B81C1/00357 ,  B81B7/0006 ,  B81B7/0048 ,  B81B2201/0242 ,  B81C2203/032 ,  H01L23/13 ,  H01L24/32 ,  H01L2224/2919 ,  H01L2224/3224 ,  H01L2224/83385 ,  H01L2924/1461 ,  H01L2924/1515 ,  H01L2924/15787 ,  H01L2924/00 ,  H01L2924/00014

Abstract: A device including a semiconductor and a substrate. The substrate has a first surface and a second surface that opposes the first surface. The substrate has a hole that extends from the first surface to the second surface and the semiconductor is secured to the substrate via adhesive in the hole.

Abstract translation: 一种包括半导体和衬底的器件。 衬底具有与第一表面相对的第一表面和第二表面。 衬底具有从第一表面延伸到第二表面的孔，并且半导体通过孔中的粘合剂固定到衬底。

公开(公告)号：US20150166330A1

公开(公告)日：2015-06-18

申请号：US14507177

申请日：2014-10-06

Applicant: mCube Inc.

Inventor： Chien Chen Lee

IPC: B81B7/00 ,  B81C1/00

CPC classification number: B81C1/00301 ,  B81B2201/0235 ,  B81B2201/0242 ,  B81B2201/0257 ,  B81B2201/0264 ,  B81C2203/0109 ,  B81C2203/0154

Abstract: A method for fabricating a MEMS-IC device structure can include receiving a CMOS substrate comprising a plurality of CMOS circuits and a surface portion. A MEMS substrate having at least one MEMS device can be received and coupled to the CMOS substrate. The MEMS substrate and the surface portion of the CMOS substrate can be encapsulated with a molding material, which forms a top surface. A first plurality of vias can be created in the molding material from the top surface to the surface portion of the CMOS substrate. A conductive material can be disposed within the first plurality of vias such that the conductive material is electrically coupled to a portion of the CMOS substrate. A plurality of interconnects can be formed from the conductive material to the top surface of the molding material and a plurality of solder balls can be formed upon these interconnects.

Abstract translation: 制造MEMS-IC器件结构的方法可以包括接收包括多个CMOS电路和表面部分的CMOS衬底。 具有至少一个MEMS器件的MEMS衬底可被接收并耦合到CMOS衬底。 MEMS衬底和CMOS衬底的表面部分可以用形成顶表面的成型材料封装。 可以在模制材料中从CMOS衬底的顶表面到表面部分形成第一多个通孔。 导电材料可以设置在第一多个通孔内，使得导电材料电耦合到CMOS衬底的一部分。 可以从导电材料形成多个互连件到模制材料的顶表面，并且可以在这些互连件上形成多个焊球。

公开(公告)号：US20150166329A1

公开(公告)日：2015-06-18

申请号：US14107034

申请日：2013-12-16

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor： Chun-wen CHENG ,  Jung-Huei PENG ,  Shang-Ying TSAI ,  Hung-Chia TSAI ,  Yi-Chuan TENG

IPC: B81B7/00 ,  B81C1/00

CPC classification number: B81B7/007 ,  B81B7/02 ,  B81B2201/0235 ,  B81B2201/0242 ,  B81B2201/0264 ,  B81B2207/07 ,  B81B2207/094 ,  B81B2207/095 ,  B81C1/00301 ,  B81C2203/0154 ,  B81C2203/0771 ,  H01L21/568 ,  H01L24/19 ,  H01L24/97 ,  H01L2224/12105 ,  H01L2224/73267 ,  H01L2924/18162

Abstract: A method of forming a semiconductor device having through molding vias comprises eutectic bonding a capping wafer and a base wafer to form a wafer package. The base wafer comprises a first chip package portion, a second chip package portion, and a third chip package portion. The capping wafer comprises a plurality of isolation trenches and a plurality of separation trenches having a depth greater than the isolation trenches with respect to a same surface of the capping wafer. The method also comprises removing a portion of the capping wafer exposing a first chip package portion contact, a second chip package portion contact, and a third chip package portion contact. The method further comprises separating the wafer package to separate the wafer package into a first chip package, a second chip package, and a third chip package.

Abstract translation: 通过成型通路形成半导体器件的方法包括共晶接合封盖晶片和基底晶片以形成晶片封装。 基底晶片包括第一芯片封装部分，第二芯片封装部分和第三芯片封装部分。 封盖晶片包括多个隔离沟槽和多个分离沟槽，其相对于封盖晶片的相同表面具有大于隔离沟槽的深度。 该方法还包括去除暴露第一芯片封装部分触点，第二芯片封装部分触点和第三芯片封装部分触点的封盖晶片的一部分。 该方法还包括分离晶片封装以将晶片封装分离成第一芯片封装，第二芯片封装和第三芯片封装。

公开(公告)号：US09040334B2

公开(公告)日：2015-05-26

申请号：US13894821

申请日：2013-05-15

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chia-Hua Chu ,  Chun-Wen Cheng

IPC: H01L21/00 ,  B81C1/00 ,  B81B3/00

CPC classification number: B81C1/00293 ,  B81B3/0021 ,  B81B7/0041 ,  B81B7/007 ,  B81B7/02 ,  B81B7/04 ,  B81B2201/0235 ,  B81B2201/0242 ,  B81B2201/025 ,  B81B2201/0264 ,  B81C1/00134 ,  B81C1/00309 ,  B81C2201/013 ,  B81C2203/0118 ,  G01C19/56 ,  G01C19/5769 ,  G01L9/0044 ,  G01L19/0076 ,  G01L19/0092 ,  G01P15/00 ,  G01P15/0802 ,  G01P15/125

Abstract: A method embodiment includes providing a micro-electromechanical (MEMS) wafer including a polysilicon layer having a first and a second portion. A carrier wafer is bonded to a first surface of the MEMS wafer. Bonding the carrier wafer creates a first cavity. A first surface of the first portion of the polysilicon layer is exposed to a pressure level of the first cavity. A cap wafer is bonded to a second surface of the MEMS wafer opposite the first surface of the MEMS wafer. The bonding the cap wafer creates a second cavity comprising the second portion of the polysilicon layer and a third cavity. A second surface of the first portion of the polysilicon layer is exposed to a pressure level of the third cavity. The first cavity or the third cavity is exposed to an ambient environment.

Abstract translation: 方法实施例包括提供包括具有第一和第二部分的多晶硅层的微机电（MEMS）晶片。 载体晶片结合到MEMS晶片的第一表面。 粘合载体晶片产生第一腔。 多晶硅层的第一部分的第一表面暴露于第一腔的压力水平。 帽晶片结合到MEMS晶片的与MEMS晶片的第一表面相对的第二表面。 接合盖晶片产生包括多晶硅层的第二部分和第三腔的第二腔。 多晶硅层的第一部分的第二表面暴露于第三腔的压力水平。 第一腔或第三腔暴露于周围环境。

公开(公告)号：US20150135830A1

公开(公告)日：2015-05-21

申请号：US14568953

申请日：2014-12-12

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： TAKASHI UCHIDA ,  TOSHIO YAMAZAKI ,  TOMOHIRO MITANI

IPC: G01C19/5705

CPC classification number: G01C19/5607 ,  B81B7/0016 ,  B81B2201/0242 ,  G01C19/5628 ,  G01C19/574 ,  G01C19/5769 ,  H01L2224/48091 ,  H01L2924/16195 ,  H01L2924/00014

Abstract: A placing member is configured to be supported from an outside by a terminal electrically connected to a terminal electrode, and an X-axis-direction extended portion, a Y-axis-direction extended portion, and a Z-axis-direction extended portion are provided in the terminal. This configuration provides an angular velocity sensor, in which a problem such that Y-axis-direction and Z-axis-direction vibrations applied from the outside cannot be damped is eliminated, and all the vibrations in three axis directions can be damped.

Abstract translation: 配置构件通过与端子电极电连接的端子从外部被支撑，并且X轴方向延伸部分，Y轴方向延伸部分和Z轴方向延伸部分是 在终端提供。 这种结构提供了一种角速度传感器，其中消除了从外部施加的Y轴方向和Z轴方向振动不能被阻尼的问题，并且可以抑制三轴方向上的所有振动。

公开(公告)号：US20150128703A1

公开(公告)日：2015-05-14

申请号：US14536091

申请日：2014-11-07

Applicant: Robert Bosch GmbH

Inventor： Arnd KAELBERER ,  Jochen REINMUTH

IPC: B81B7/02 ,  B81C1/00 ,  G01P15/08

CPC classification number: B81B7/0048 ,  B81B2201/0235 ,  B81B2201/0242 ,  B81B2207/012 ,  B81B2207/096 ,  B81C1/00238 ,  B81C2203/0792 ,  G01P15/0802 ,  G01P2015/0882

Abstract: A micromechanical sensor device includes an evaluation circuit formed in a first substrate, and an MEMS structure which is situated in a cavity delimited by a second substrate and a third substrate, the MEMS structure and the second substrate being situated on top of each other, the MEMS structure being functionally connected to the evaluation circuit via a contact area, the contact area between the MEMS structure and the first substrate being situated essentially centrally on the second substrate and essentially centrally on the first substrate and has an essentially punctiform configuration, proceeding radially from the contact area, a clearance being formed between the first substrate and the second substrate.

Abstract translation: 微机械传感器装置包括形成在第一基板中的评估电路和位于由第二基板和第三基板限定的空腔中的MEMS结构，所述MEMS结构和第二基板位于彼此之上， MEMS结构通过接触区域功能地连接到评估电路，MEMS结构和第一基底之间的接触面积基本上位于第二基底上并且基本上位于第一基底上，并且具有基本上点状的构型，从 所述接触区域，在所述第一基板和所述第二基板之间形成间隙。

公开(公告)号：US20150115378A1

公开(公告)日：2015-04-30

申请号：US14524661

申请日：2014-10-27

Applicant: STMicroelectronics S.r.l.

Inventor： Giorgio Allegato ,  Marco Ferrera ,  Matteo Garavaglia ,  Lorenzo Corso

IPC: B81B7/00 ,  B81C1/00

CPC classification number: B81B7/0074 ,  B81B2201/0235 ,  B81B2201/0242 ,  B81B2207/012 ,  B81B2207/097 ,  B81C1/00238 ,  B81C1/00325 ,  B81C2203/0118 ,  B81C2203/0792

Abstract: A method for manufacturing a die assembly, including the steps of: bonding a first wafer of semiconductor material to a second wafer, the second wafer including a respective semiconductor body having a respective initial thickness and forming an integrated electronic circuit; and subsequently reducing the initial thickness of the semiconductor body of the second wafer; and subsequently bonding the second wafer to a third wafer, the third wafer forming a micro-electromechanical sensing structure.

Abstract translation: 一种用于制造模具组件的方法，包括以下步骤：将半导体材料的第一晶片接合到第二晶片，所述第二晶片包括具有各自的初始厚度的相应的半导体本体，并形成集成的电子电路; 随后减小第二晶片的半导体本体的初始厚度; 并且随后将所述第二晶片接合到第三晶片，所述第三晶片形成微机电感测结构。