公开(公告)号：US20070235218A1

公开(公告)日：2007-10-11

申请号：US11530344

申请日：2006-09-08

Applicant: Nobuaki Miyamoto ,  Akira Chinda ,  Koki Hirasawa ,  Kenji Uchida

Inventor： Nobuaki Miyamoto ,  Akira Chinda ,  Koki Hirasawa ,  Kenji Uchida

IPC: H05K1/11 ,  H01R12/04

CPC classification number: H05K1/113 ,  H01L21/4857 ,  H01L21/6835 ,  H01L23/49816 ,  H01L23/49822 ,  H01L24/32 ,  H01L24/81 ,  H01L2221/68345 ,  H01L2224/16225 ,  H01L2224/32057 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81801 ,  H01L2224/83102 ,  H01L2224/83385 ,  H01L2224/92125 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/19042 ,  H05K3/0023 ,  H05K3/007 ,  H05K3/025 ,  H05K3/064 ,  H05K3/244 ,  H05K3/386 ,  H05K3/421 ,  H05K2201/0394 ,  H05K2201/09472 ,  H05K2203/0156 ,  H05K2203/0733 ,  H01L2924/00012 ,  H01L2924/00

Abstract: An electronic device substrate is formed of a thin-plate reinforcing substrate; an external connection wiring layer stacked on the reinforcing substrate, and comprising an electrical insulation provided on the reinforcing substrate, an opening formed in the electrical insulation, a first conductor pattern and a via-hole conductor provided in the opening and formed integrally with each other; and a second conductor pattern formed on the opposite side of the electrical insulation to the reinforcing substrate, and at least partially electrically connected to the via-hole conductor.

Abstract translation: 电子器件基板由薄板加强基板形成; 叠层在所述加强基板上的外部连接布线层，并且包括设置在所述加强基板上的电绝缘体，形成在所述电绝缘体中的开口，设置在所述开口中的第一导体图案和通孔导体，并且彼此一体地形成 ; 以及第二导体图案，其形成在与所述加强基板的所述电绝缘体的相对侧上，并且至少部分地电连接到所述通孔导体。

公开(公告)号：US07278564B2

公开(公告)日：2007-10-09

申请号：US10839283

申请日：2004-05-06

Applicant: Atsushi Saito

Inventor： Atsushi Saito

IPC: B23K31/00 ,  B23K31/02

CPC classification number: H01L24/83 ,  H01L23/13 ,  H01L23/49827 ,  H01L24/29 ,  H01L24/81 ,  H01L2224/05573 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2224/29101 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/29344 ,  H01L2224/29355 ,  H01L2224/73204 ,  H01L2224/81801 ,  H01L2224/8319 ,  H01L2224/838 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/0781 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/3025 ,  H05K1/112 ,  H05K3/4038 ,  H05K3/4069 ,  H05K2201/0305 ,  H05K2201/0394 ,  H05K2201/09472 ,  H05K2201/10674 ,  H01L2924/00 ,  H01L2224/05599

Abstract: The invention provides a method of mounting an electronic component where an electronic component can be reliably electrically-connected to a substrate. A substrate defines a through-hole that extends through the substrate, from connection electrodes formed on the lower surface of the substrate, to the upper surface of the substrate. A low melting point metal is connected to the connection electrodes and fills the through-hole. A bump and the low melting point metal are alloyed and bonded by heating the low melting point metal while pressing the bump formed on an electrode pad of an electronic component, with respect to a front end of the low melting point metal. The active surface of the electronic component is sealed by the upper surface of the substrate.

Abstract translation: 本发明提供了一种安装电子部件的方法，其中电子部件可以可靠地电连接到基板。 衬底限定了从衬底的下表面上形成的连接电极延伸到衬底的通孔到衬底的上表面。 低熔点金属连接到连接电极并填充通孔。 通过在相对于低熔点金属的前端挤压形成在电子部件的电极焊盘上的凸块的同时加热低熔点金属，将凸块和低熔点金属合金化并结合。 电子部件的有源表面被基板的上表面密封。

公开(公告)号：US07258264B2

公开(公告)日：2007-08-21

申请号：US11066056

申请日：2005-02-25

Applicant: Donald A. Ice ,  Darin James Douma

Inventor： Donald A. Ice ,  Darin James Douma

IPC: B23K31/02 ,  B23K31/00 ,  H01R12/00 ,  H01R27/00 ,  H01R13/405

CPC classification number: G02B6/4246 ,  H05K1/0393 ,  H05K1/141 ,  H05K3/202 ,  H05K3/3405 ,  H05K3/3447 ,  H05K2201/0394 ,  H05K2201/09118 ,  H05K2201/10121 ,  H05K2201/10446 ,  H05K2201/10924 ,  H05K2203/302

Abstract: Methods of manufacturing optical transceiver modules using lead frame connectors that connect optical sub-assemblies to printed circuit boards are disclosed. The lead frame connector includes an electrically insulating case having a first part separated from a second part and a plurality of conductors that are electrically isolated one from another by the electrically insulating case. Each of the plurality of conductors can form an electrical contact restrained in a fixed position with respect to the first part and a contact point extending from the second part. The electrical contact is aligned with and soldered to the leads that protrude from the back end of an optical sub-assembly. The contact points can then be connected to electrical pads on a PCB.

Abstract translation: 公开了使用将光学子组件连接到印刷电路板的引线框架连接器制造光收发器模块的方法。 引线框架连接器包括具有与第二部分分离的第一部分的电绝缘壳体和由电绝缘壳体彼此电隔离的多个导体。 多个导体中的每一个可以形成相对于第一部分被限制在固定位置的电触点和从第二部分延伸的接触点。 电触点对准并焊接到从光学子组件的后端突出的引线。 接触点可以连接到PCB上的电焊盘。

公开(公告)号：US20070166886A1

公开(公告)日：2007-07-19

申请号：US10572340

申请日：2004-09-15

Applicant: Antti Iihola ,  Timo Jokela

Inventor： Antti Iihola ,  Timo Jokela

IPC: H01L21/00

CPC classification number: H05K1/188 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/24 ,  H01L24/82 ,  H01L25/0655 ,  H01L25/50 ,  H01L2224/24227 ,  H01L2224/82039 ,  H01L2224/92144 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01057 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/07802 ,  H05K3/4602 ,  H05K3/4611 ,  H05K3/4652 ,  H05K2201/0355 ,  H05K2201/0394 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49156 ,  H01L2924/00

Abstract: This publication discloses a method for manufacturing an electronic module, in which manufacture commences from an insulating-material sheet (1). At least one recess (2) is made in the sheet (1) and extends through the insulating-material layer (1) as far as the conductive layer on the opposite surface (1a). A component (6) is set in the recess, with its contact surface towards the conductive layer and the component (6) is attached to the conductive layer. After this, a conductive pattern (14) is formed from the conductive pattern closing the recess, which is electrically connected from at least some of the contact areas or contact protrusions of the component (6) set in the recess.

Abstract translation: 该出版物公开了一种制造电子模块的方法，其中制造从绝缘材料片（1）开始。 在片材（1）中形成至少一个凹部（2），并延伸穿过绝缘材料层（1）至相对表面（1a）上的导电层。 将部件（6）设置在凹部中，其接触表面朝向导电层，并且部件（6）附接到导电层。 之后，从导电图案形成导电图案（14），所述导电图案封闭凹部，所述导电图案与设置在凹部中的部件（6）的至少一些接触区域或接触突起电连接。

公开(公告)号：US20070144769A1

公开(公告)日：2007-06-28

申请号：US11320922

申请日：2005-12-28

Applicant: Islam Salama

Inventor： Islam Salama

IPC: H05K1/16

CPC classification number: H05K3/4661 ,  H01L21/486 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2924/0002 ,  H05K3/027 ,  H05K3/185 ,  H05K3/4007 ,  H05K3/421 ,  H05K3/423 ,  H05K2201/0367 ,  H05K2201/0394 ,  H05K2201/09563 ,  H05K2201/09745 ,  H05K2203/0369 ,  H05K2203/0733 ,  H05K2203/107 ,  H05K2203/1476 ,  Y10T29/49155 ,  Y10T29/49156 ,  H01L2924/00

Abstract: A printed circuit is made by laser projection patterning a metal panel of a substrate, laminating a dielectric layer on the metal panel, laser irradiating the substrate to form vias in the substrate, laser activating a seed coat on the substrate, washing the seed coat from an unpatterned portion of the substrate, forming a patterned build-up layer on the substrate, and etching away a metal plating forming metal protrusions.

Abstract translation: 通过激光投影图案化衬底的金属面板，在金属面板上层叠电介质层，激光照射衬底以在衬底中形成通孔，激光激活衬底上的种皮，将种皮从 基板的未图案化部分，在基板上形成图案化的积层，并蚀刻形成金属电镀的金属突起。

公开(公告)号：US20070143994A1

公开(公告)日：2007-06-28

申请号：US11681964

申请日：2007-03-05

Applicant: Anthony Primavera ,  Steven Findell

Inventor： Anthony Primavera ,  Steven Findell

IPC: H01L21/331

CPC classification number: H05K1/0271 ,  H05K1/0201 ,  H05K1/0269 ,  H05K1/0272 ,  H05K1/115 ,  H05K2201/0133 ,  H05K2201/0187 ,  H05K2201/0394 ,  H05K2201/062 ,  H05K2201/09036 ,  H05K2201/09063 ,  H05K2201/09509 ,  H05K2203/161 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T29/49204

Abstract: This document discusses, among other things, a flexible circuit or other laminate comprising a first conductive layer and a second conductive layer disposed over the first conductive layer. An insulator is disposed between the first and second conductive layers. A conductive via extends through the insulator and electrically connects the first and second conductive layers. The laminate includes a channel in the insulator. In one option, the channel extends at least part way around the via. In another option, the channel extends at least part way between the first and second conductive layers. In another example, a method comprises providing a laminate including at least first and second conductive layers and an insulator disposed therebetween. A via is formed through the insulator. A channel is formed in the insulator at least part way around the via. The channel extends between the first and second conductive layers.

Abstract translation: 本文件尤其涉及柔性电路或其它层压体，其包括设置在第一导电层上的第一导电层和第二导电层。 绝缘体设置在第一和第二导电层之间。 导电通孔延伸穿过绝缘体并电连接第一和第二导电层。 层压板包括绝缘体中的通道。 在一个选项中，通道至少部分地围绕通道延伸。 在另一选择中，通道至少部分地在第一和第二导电层之间延伸。 在另一示例中，一种方法包括提供包括至少第一和第二导电层以及设置在其间的绝缘体的层压体。 通孔通过绝缘体形成。 在绝缘体中至少部分地围绕通孔形成通道。 通道在第一和第二导电层之间延伸。

公开(公告)号：US20070120240A1

公开(公告)日：2007-05-31

申请号：US11288691

申请日：2005-11-29

Applicant: Siang Foo ,  Wee Tay ,  Wai Poon

Inventor： Siang Foo ,  Wee Tay ,  Wai Poon

IPC: H01L23/02

CPC classification number: H01L23/4985 ,  H01L21/4871 ,  H01L23/3121 ,  H01L23/564 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L2224/16 ,  H01L2224/32057 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/81801 ,  H01L2224/83385 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/15173 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19043 ,  H05K3/002 ,  H05K3/0035 ,  H05K3/0052 ,  H05K3/242 ,  H05K3/284 ,  H05K3/388 ,  H05K2201/0394 ,  H01L2924/00012 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: An aspect of the present invention comprises a method of producing a circuit substrate comprising providing a substrate, coating the substrate with a conductive layer, patterning the conductive layer to form at least two circuits joined by a buss-line and forming a slot in the substrate beneath the buss-line. Another aspect of the present invention comprises a circuit substrate with at least two circuits joined by a buss-line and a slot in the substrate beneath the buss-line. Another aspect of the present invention comprises an integrated circuit package with the described circuit substrate.

Abstract translation: 本发明的一个方面包括一种制造电路衬底的方法，包括提供衬底，用导电层涂覆衬底，图案化导电层以形成由母线连接并在衬底中形成槽的至少两个电路 在公交车下面。 本发明的另一方面包括具有至少两个电路的电路基板，所述至少两个电路通过母线连接，并且在所述母线下方的所述基板中的狭槽。 本发明的另一方面包括具有所述电路基板的集成电路封装。

公开(公告)号：US20070096328A1

公开(公告)日：2007-05-03

申请号：US11480824

申请日：2006-07-06

Applicant: Michimasa Takahashi ,  Yukinobu Mikado ,  Takenobu Nakamura ,  Masakazu Aoyama

Inventor： Michimasa Takahashi ,  Yukinobu Mikado ,  Takenobu Nakamura ,  Masakazu Aoyama

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC classification number: H01L23/48 ,  H01L2924/0002 ,  H05K1/115 ,  H05K3/00 ,  H05K3/4602 ,  H05K3/4652 ,  H05K2201/0352 ,  H05K2201/0394 ,  H05K2201/09563 ,  H05K2201/096 ,  H05K2201/09709 ,  H05K2201/09827 ,  Y10T29/49124 ,  H01L2924/00

Abstract: A multilayer printed wiring board comprises a plurality of insulating layers which is about 100 μm or less in thickness and a plurality of conductor circuits formed on the insulating layers. Each of a plurality of viaholes electrically connecting conductor circuits on the insulating layers to each other is formed tapered inwardly from the surface of the insulating layer and the viaholes are disposed opposite to each other to form a multistage stacked vias.

Abstract translation: 多层印刷线路板包括多个厚度为100μm以下的绝缘层和在绝缘层上形成的多个导体电路。 将绝缘层上的导体电路彼此电连接的多个通孔中的每一个从绝缘层的表面向内形成为锥形，并且通孔彼此相对设置以形成多级堆叠通孔。

公开(公告)号：US07205668B2

公开(公告)日：2007-04-17

申请号：US11285334

申请日：2005-11-22

Applicant: Ching-Yuan Wu ,  Kuang-Jen Liu ,  Chun-Chi Hsu

Inventor： Ching-Yuan Wu ,  Kuang-Jen Liu ,  Chun-Chi Hsu

IPC: H01L23/04 ,  H01L23/02 ,  H05K7/06

CPC classification number: H05K1/115 ,  H05K3/421 ,  H05K3/429 ,  H05K2201/0394 ,  H05K2201/09509 ,  H05K2201/09836

Abstract: A multi-layer printed circuit board (PCB) includes a first wire layer, a middle layer above the first wire layer, a second wire layer above the middle layer, and a slanting via formed in the middle layer and the second wire layer. The manufacturing method includes the steps of providing a first wire layer and forming a first wiring on the first wire layer, forming a middle layer on the first wire layer, forming a second wire layer on the middle layer, forming a slanting via in the middle layer and the second wire layer wherein the direction of the slanting via is not orthogonal to the first and the second wire layers, forming a second wiring on the second wire layer by an etching method, and forming an electroplated layer in the via to connect the first wiring and the second wiring.

Abstract translation: 多层印刷电路板（PCB）包括第一布线层，第一布线层之上的中间层，中间层上方的第二布线层和形成在中间层和第二布线层中的倾斜孔。 该制造方法包括以下步骤：在第一布线层上形成第一布线层并形成第一布线，在第一布线层上形成中间层，在中间层上形成第二布线层，在中间层形成倾斜孔 层和第二线层，其中倾斜通孔的方向不与第一和第二线层正交，通过蚀刻方法在第二线层上形成第二布线，并且在通孔中形成电镀层以连接 第一布线和第二布线。

公开(公告)号：US07205486B2

公开(公告)日：2007-04-17

申请号：US10892648

申请日：2004-07-16

Applicant: Anthony Primavera ,  Steven P. Findell

Inventor： Anthony Primavera ,  Steven P. Findell

IPC: H01L23/48

CPC classification number: H05K1/0271 ,  H05K1/0201 ,  H05K1/0269 ,  H05K1/0272 ,  H05K1/115 ,  H05K2201/0133 ,  H05K2201/0187 ,  H05K2201/0394 ,  H05K2201/062 ,  H05K2201/09036 ,  H05K2201/09063 ,  H05K2201/09509 ,  H05K2203/161 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T29/49204

Abstract: This document discusses, among other things, a flexible circuit or other laminate comprising a first conductive layer and a second conductive layer disposed over the first conductive layer. An insulator is disposed between the first and second conductive layers. A conductive via extends through the insulator and electrically connects the first and second conductive layers. The laminate includes a channel in the insulator. In one option, the channel extends at least part way around the via. In another option, the channel extends at least part way between the first and second conductive layers. In another example, a method comprises providing a laminate including at least first and second conductive layers and an insulator disposed therebetween. A via is formed through the insulator. A channel is formed in the insulator at least part way around the via. The channel extends between the first and second conductive layers.

Abstract translation: 本文件尤其涉及柔性电路或其它层压体，其包括设置在第一导电层上的第一导电层和第二导电层。 绝缘体设置在第一和第二导电层之间。 导电通孔延伸穿过绝缘体并电连接第一和第二导电层。 层压板包括绝缘体中的通道。 在一个选项中，通道至少部分地围绕通道延伸。 在另一选择中，通道至少部分地在第一和第二导电层之间延伸。 在另一示例中，一种方法包括提供包括至少第一和第二导电层以及设置在其间的绝缘体的层压体。 通孔通过绝缘体形成。 在绝缘体中至少部分地围绕通孔形成通道。 通道在第一和第二导电层之间延伸。