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    Laminar stackable circuit board structure with capacitor
    92.
    发明授权
    Laminar stackable circuit board structure with capacitor 失效
    具有电容器的层叠叠层电路板结构

    公开(公告)号：US6098282A

    公开(公告)日：2000-08-08

    申请号：US34072

    申请日：1998-03-03

    Applicant: Jerome Albert Frankeny ,  Richard Francis Frankeny ,  Terry Frederick Hayden ,  Ronald Lann Imken ,  Janet Louise Rice

    Inventor： Jerome Albert Frankeny ,  Richard Francis Frankeny ,  Terry Frederick Hayden ,  Ronald Lann Imken ,  Janet Louise Rice

    IPC: H05K1/16 ,  H05K3/46 ,  H05K3/42

    CPC classification number: H05K3/462 ,  H05K1/162 ,  H05K3/4641 ,  H01L2224/81385 ,  H05K2201/0175 ,  H05K2201/0179 ,  H05K2201/0317 ,  H05K2201/0355 ,  H05K2201/09309 ,  H05K2201/09509 ,  H05K2201/09718 ,  H05K2203/0307 ,  H05K3/4623 ,  Y10T29/435 ,  Y10T29/49165 ,  Y10T29/49169

    Abstract: Method and apparatus for fabricating fine pitch pattern multilayer printed circuit boards involving laminar stackable board layers providing power distribution, signal distribution and capacitive decoupling. In one respect, the invention relates to the fabrication of board layers by beginning with a metallic core, patterning the core, selectively enclosing the core in a dielectric, selectively depositing metal to form vias, plugs and signal lines, and forming dendrites with joining metallurgy on the vias and plugs to provide stackable connection from above or below the plane of the board layer. In another aspect, the invention is directed to the use of a sol-gel process to form a thin high dielectric constant crystalline film onto a metallic sheet followed with a deposition of a metallic layer onto the high dielectric constant film. The film serves as the dielectric of a capacitor layer which is thereafter in succession patterned, covered by a dielectric, and has selectively deposited a metallic layer for interconnecting the capacitor and forming vias. The ends of the vias are thereafter subject to dendritic growth and joining metallurgy to provide stackable interconnection capability. A multilayer composite laminar stackable circuit board structure is created using, as appropriate, layers having metallic cores and layers having capacitively configured cores. The multilayer laminar stackable circuit board provides direct vertical connection between surface mounted electronic components and the power, signal and capacitive decoupling layers of the composite board through the dendrites and joining metallurgy of the via and plug formations.

    Abstract translation: 用于制造精细间距图案多层印刷电路板的方法和装置，其包括提供功率分配，信号分配和电容去耦的层叠堆叠板层。 在一个方面，本发明涉及通过金属芯开始制造板层，图案化芯，选择性地将芯包围在电介质中，选择性地沉积金属以形成通孔，插塞和信号线，以及用连接冶金形成树突 在通孔和插头上，以从板层的平面上方或下方提供可堆叠连接。 在另一方面，本发明涉及使用溶胶 - 凝胶法在金属片上形成薄的高介电常数结晶膜，随后在高介电常数膜上沉积金属层。 该膜用作电容器层的电介质，其后连续地被图案化，被电介质覆盖，并且已经选择性地沉积用于互连电容器和形成通孔的金属层。 然后通孔的端部经历树枝状生长并连接冶金以提供可堆叠的互连能力。 使用适当的方式，使用具有金属芯层和具有电容配置芯的层来形成多层复合层叠堆叠电路板结构。 多层层叠堆叠电路板通过树枝状晶体和连接通孔和插塞结构的冶金，提供表面贴装的电子元件与复合板的功率，信号和电容去耦层之间的直接垂直连接。

    Integrated circuit packaging using flexible substrate
    96.
    发明授权
    Integrated circuit packaging using flexible substrate 失效
    集成电路使用柔性基板包装

    公开(公告)号：US5065227A

    公开(公告)日：1991-11-12

    申请号：US533262

    申请日：1990-06-04

    Applicant: Jerome A. Frankeny ,  Richard F. Frankeny ,  Karl Hermann ,  Ronald L. Imken

    Inventor： Jerome A. Frankeny ,  Richard F. Frankeny ,  Karl Hermann ,  Ronald L. Imken

    IPC: H01L21/60 ,  H01L21/66 ,  H01L23/14 ,  H01L23/373 ,  H01L23/498 ,  H05K1/00 ,  H05K3/42 ,  H05K3/44

    CPC classification number: H05K3/429 ,  H01L23/142 ,  H01L23/3735 ,  H01L23/4985 ,  H05K3/445 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2924/01019 ,  H01L2924/01078 ,  H05K1/0393 ,  H05K2201/0154 ,  H05K2201/068 ,  H05K2201/09581 ,  H05K2201/09718 ,  H05K2201/09881 ,  H05K2203/0323 ,  H05K2203/1438 ,  Y10T29/41

    Abstract: A multilayer, flexible substrate upon which integrated circuit chips can be attached is disclosed. The input/output(I/O) connections from the chip do not radiate outward from the side of the die, but rather extend from a bottom surface. Since the I/O signal lines would not be accessible for testing once the IC chip is mounted on a substrate, each I/O line is extended outward from the IC footprint to an area on the substrate which is accessible. Additionally, an electrical path from each I/O signal port is simultaneously passed through the substrate layers upon which the chip is mounted, thus providing electrical contact of all I/O ports to the underside of the flexible substrate.An integrated circuit chip is mounted on this flexible substrate. Since each I/O line is accessible after mounting, the IC chip can be tested prior to mounting on its ultimate carrier. Once tested, the IC chip and the substrate upon which it is mounted are excised from the roll of substrate material. This excised, pretested memory package, which includes both the IC chip and the flexible substrate, can then be mounted directly onto the ultimate carrier either by reflow soldering or direct bonding.

    Abstract translation: 公开了可以连接集成电路芯片的多层柔性基板。 来自芯片的输入/输出（I / O）连接不会从模具侧向外辐射，而是从底部表面延伸。 由于一旦将IC芯片安装在基板上，I / O信号线将无法进行测试，因此每个I / O线从IC占位区向外延伸到可访问的基板上的区域。 此外，来自每个I / O信号端口的电路同时通过其上安装有芯片的基板层，从而提供所有I / O端口与柔性基板的下侧的电接触。 集成电路芯片安装在该柔性基板上。 由于每个I / O线在安装后都可以访问，因此IC芯片可以在安装在其最终的载波上进行测试。 一旦被测试，将IC芯片及其安装在其上的基板从基板材料卷上切下。 包括IC芯片和柔性基板的切除的预测试存储器封装可以通过回流焊接或直接接合直接安装在极限载体上。

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