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    CHIP COMPONENT MOUNTING STRUCTURE, AND MODULE COMPONENT
    92.
    发明申请
    CHIP COMPONENT MOUNTING STRUCTURE, AND MODULE COMPONENT 有权
    芯片组件安装结构和模块组件

    公开(公告)号：US20150257266A1

    公开(公告)日：2015-09-10

    申请号：US14718367

    申请日：2015-05-21

    Applicant: Murata Manufacturing Co., Ltd.

    Inventor： Hiromi MURAYAMA ,  Kazuaki HIGASHIBATA ,  Noboru KATO

    IPC: H05K1/11 ,  H05K1/03 ,  G06K19/077 ,  H05K1/02

    CPC classification number: H05K1/111 ,  G06K19/0772 ,  G06K19/07754 ,  G06K19/07756 ,  H01L23/49855 ,  H01L2224/16225 ,  H01L2924/15313 ,  H01Q1/2225 ,  H01Q9/20 ,  H05K1/0259 ,  H05K1/028 ,  H05K1/0295 ,  H05K1/03 ,  H05K2201/09427 ,  H05K2201/0979 ,  H05K2201/09954 ,  H05K2201/10628 ,  Y02P70/611

    Abstract: A chip component includes external terminals on a mounting surface thereof at positions that are rotationally symmetric to each other by 180 degrees with respect to a center of the mounting surface. A substrate includes first and second mounting terminals on the mounting surface of the substrate at first diagonal positions of a square indicated by a two dot chain line, and third and fourth mounting terminals on the surface of the substrate at second diagonal positions of the square. The first and fourth mounting terminals are connected by a first terminal connecting portion, and the second and third mounting terminals are connected by a second terminal connecting portion. The chip component is configured to be mounted in any of four directions obtained by rotating the chip component every 90 degrees and achieves the same electrical characteristics.

    Abstract translation: 芯片部件在其安装表面上包括相对于安装表面的中心相互旋转对称180度的位置的外部端子。 衬底包括在由两点划线表示的正方形的第一对角位置处的衬底的安装表面上的第一和第二安装端子，以及在正方形的第二对角线位置处的衬底的表面上的第三和第四安装端子。 第一和第四安装端子通过第一端子连接部分连接，第二和第三安装端子通过第二端子连接部分连接。 芯片部件被配置为安装在通过每90度旋转芯片部件而获得的四个方向中的任一个，并且实现相同的电特性。

    Multi-configuration GPU interface device
    95.
    发明授权
    Multi-configuration GPU interface device 有权
    多配置GPU接口设备

    公开(公告)号：US08698305B1

    公开(公告)日：2014-04-15

    申请号：US10912393

    申请日：2004-08-04

    Applicant: Thomas E. Dewey ,  James K. Dobbins ,  Joseph S. Minacapelli ,  Simon A. Thomas

    Inventor： Thomas E. Dewey ,  James K. Dobbins ,  Joseph S. Minacapelli ,  Simon A. Thomas

    IPC: H01L23/48 ,  H05K5/00

    CPC classification number: H05K1/0295 ,  H05K2201/09954 ,  H05K2201/10674 ,  H05K2201/10734

    Abstract: A multi-configuration interface device for coupling different types of GPUs (graphics processor units) to a PCB (printed circuit board). The interface device comprises a GPU interface for a connection to the GPU and a PCB interface for a connection to the PCB. The GPU interface is implemented using a customizable attachment footprint for effectuating a connection to differing GPU types while maintaining the PCB interface for the connection to the PCB. The ball array for different GPUs can be configured to respectively support them. The interface device maintains a consistent PCB interface. Thus, as GPU characteristics change and evolve, or as different GPU versions are implemented, a consistent connection can be maintained for the PCB.

    Abstract translation: 用于将不同类型的GPU（图形处理器单元）耦合到PCB（印刷电路板）的多配置接口设备。 接口设备包括用于连接到GPU的GPU接口和用于连接到PCB的PCB接口。 GPU接口使用可自定义的附件空间实现，用于实现与不同GPU类型的连接，同时保持用于连接到PCB的PCB接口。 用于不同GPU的球阵列可以配置为分别支持它们。 接口设备维护一致的PCB接口。 因此，随着GPU特性的变化和演变，或者随着不同的GPU版本的实现，PCB可以保持一致的连接。

    Surface mount devices with minimum lead inductance and methods of manufacturing the same
    97.
    发明授权
    Surface mount devices with minimum lead inductance and methods of manufacturing the same 有权
    具有最小引线电感的表面贴装器件及其制造方法

    公开(公告)号：US08493744B2

    公开(公告)日：2013-07-23

    申请号：US11732543

    申请日：2007-04-03

    Applicant: Qiang Richard Chen

    Inventor： Qiang Richard Chen

    IPC: H05K7/00

    CPC classification number: H05K3/3442 ,  H01L27/016 ,  H01L27/13 ,  H05K1/16 ,  H05K3/366 ,  H05K3/403 ,  H05K2201/0317 ,  H05K2201/09954 ,  H05K2201/10045 ,  Y02P70/613

    Abstract: A device according to various aspects of the present invention generally includes a surface mount device having a top side, a bottom side, a plurality of sidewalls, and a circuit comprising one or more layers. The device includes a first conductive surface covering a portion of one of the sidewalls for providing an input to the circuit, a second conductive surface covering a portion of one of the sidewalls for providing an output from the circuit, and a third conductive surface covering a portion of one of the sidewalls for providing an electrical ground to the circuit. When the surface mount device is mounted to a provided mounting surface, at least one layer of the circuit is orthogonal to the provided mounting surface.

    Abstract translation: 根据本发明的各个方面的装置通常包括具有顶侧，底侧，多个侧壁和包括一个或多个层的电路的表面安装装置。 所述装置包括覆盖所述侧壁之一的一部分以提供所述电路的输入的第一导电表面，覆盖所述侧壁之一的一部分以提供来自所述电路的输出的第二导电表面，以及覆盖所述侧壁的第三导电表面 所述侧壁之一的一部分用于向所述电路提供电接地。 当表面安装装置安装到所提供的安装表面时，电路的至少一层与所提供的安装表面正交。

    Connector assembly
    98.
    发明授权
    Connector assembly 失效
    连接器组件

    公开(公告)号：US08433839B2

    公开(公告)日：2013-04-30

    申请号：US13274344

    申请日：2011-10-16

    Applicant: Zheng-Heng Sun

    Inventor： Zheng-Heng Sun

    IPC: H05K7/10

    CPC classification number: H05K1/029 ,  H05K1/141 ,  H05K2201/09954 ,  H05K2201/10045 ,  H05K2201/10189

    Abstract: A connector assembly includes first to fifth connectors, two PCIe slots, and an adapter board. When the first connector is connected to the fifth connector, and the third connector is connected to the fourth connector, signals at the pins of the third connector are transmitted to the second group of pins of the first PCIe slot through the fourth connector, the fifth connector, and the first connector in series. When the second connector is connected to the fifth connector, and the third connector is connected to the fourth connector, signals at pins of the third connector are transmitted to the fourth group of pins of the second PCIe slot through the fourth connector, the fifth connector, and the second connector in series.

    Abstract translation: 连接器组件包括第一至第五连接器，两个PCIe插槽和适配器板。 当第一连接器连接到第五连接器，并且第三连接器连接到第四连接器时，第三连接器的引脚处的信号通过第四连接器传送到第一PCIe插槽的第二组引脚，第五连接器 连接器和串联的第一连接器。 当第二连接器连接到第五连接器，并且第三连接器连接到第四连接器时，通过第四连接器将第三连接器的引脚处的信号传输到第二PCIe插槽的第四组引脚，第五连接器 ，第二连接器串联。

    Dual PCI-X/PCI-E card
    99.
    发明授权
    Dual PCI-X/PCI-E card 有权
    双PCI-X / PCI-E卡

    公开(公告)号：US08423695B2

    公开(公告)日：2013-04-16

    申请号：US11037177

    申请日：2005-01-19

    Applicant: Charles J. Purwin

    Inventor： Charles J. Purwin

    IPC: H05K7/10

    CPC classification number: H05K1/117 ,  H05K1/0295 ,  H05K1/181 ,  H05K2201/09954

    Abstract: A dual bus interface PCB includes a main chipset component, a first type bus interface connector, and a second type bus interface connector. The PCB can be configured at fabrication time to enable a variety of configurations for operation. Optionally, the PCB can also be provided at least one memory chip and a NIC (Network Interface Card) chip. By virtue of having a dual interface, the PCB can be used with either the first type or the second type bus. Furthermore, the dual interface PCB eliminates the need by chipset manufacturers to carry multiple PCB variations of the same product in order to support various bus interfaces. In one embodiment, the PCB is a dual PCI-X/PCI-E interface PCB.

    Abstract translation: 双总线接口PCB包括主芯片组件，第一类型总线接口连接器和第二类型总线接口连接器。 PCB可以在制造时配置，以实现各种配置以进行操作。 可选地，PCB还可以提供至少一个存储器芯片和NIC（网络接口卡）芯片。 由于具有双接口，PCB可以与第一类型或第二类型总线一起使用。 此外，双接口PCB消除了芯片组制造商携带同一产品的多个PCB变体以支持各种总线接口的需要。 在一个实施例中，PCB是双PCI-X / PCI-E接口PCB。

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