公开(公告)号：US07183492B2

公开(公告)日：2007-02-27

申请号：US11055617

申请日：2005-02-11

Applicant: Shih-Chieh Chao ,  Chih-Wen Huang ,  Chun-Lin Liao

Inventor： Shih-Chieh Chao ,  Chih-Wen Huang ,  Chun-Lin Liao

IPC: H05K1/03

CPC classification number: H05K1/0218 ,  H05K1/0219 ,  H05K2201/09236 ,  H05K2201/09972

Abstract: A multi-layer printed circuit board having a low noise characteristic, the multi-layer printed circuit board includes: at least one circuit layer; at least one isolation line for dividing the at least one circuit layer into at least two areas, the at least one isolation line forms an open pattern and the at least one isolation line extendedly forms a long neck line into the at least one area, and an internal opening of the long neck line located at a geometric center of the at least one area to improve the isolation, especially for the noises near the resonant frequencies of the isolation areas.

Abstract translation: 一种具有低噪声特性的多层印刷电路板，所述多层印刷电路板包括：至少一个电路层; 用于将所述至少一个电路层分成至少两个区域的至少一个隔离线，所述至少一个隔离线形成开放图案，并且所述至少一个隔离线在所述至少一个区域中延伸形成长颈线，以及 位于所述至少一个区域的几何中心处的长颈线的内部开口，以改善隔离，特别是对于隔离区域的谐振频率附近的噪声。

公开(公告)号：US07172436B2

公开(公告)日：2007-02-06

申请号：US10800677

申请日：2004-03-16

Applicant: Koichi Uezono

Inventor： Koichi Uezono

IPC: H01R12/00

CPC classification number: B60R16/0238 ,  H05K1/0263 ,  H05K3/103 ,  H05K7/026 ,  H05K2201/0391 ,  H05K2201/09845 ,  H05K2201/09972 ,  H05K2201/10272 ,  H05K2201/10287

Abstract: A first board, on which electric wires are wired, includes a first part having a first thickness and a second part continued from the first part and having a second thickness smaller than the first thickness. A second board, on which bus bars are arranged, is disposed on the second part of the first board. The second board has a third thickness which is determined such that an additional thickness of the second thickness and the third thickness is not greater than the first thickness.

Abstract translation: 电线布线在其上的第一板包括具有第一厚度的第一部分和从第一部分延续的第二部分，并且具有小于第一厚度的第二厚度。 布置有母线的第二板被布置在第一板的第二部分上。 第二板具有第三厚度，其被确定为使得第二厚度和第三厚度的附加厚度不大于第一厚度。

公开(公告)号：US20070020971A1

公开(公告)日：2007-01-25

申请号：US11479474

申请日：2006-06-30

Applicant: Keith Everett ,  Kevin Little ,  Jamie Anderson

Inventor： Keith Everett ,  Kevin Little ,  Jamie Anderson

IPC: H05K1/00

CPC classification number: H05K1/0218 ,  H05K3/325 ,  H05K9/0058 ,  H05K2201/09481 ,  H05K2201/09572 ,  H05K2201/09972 ,  H05K2201/10371

Abstract: A fibre optic module has a PCB with high frequency tracks. The PCB is housed within a housing having top and bottom parts, each having a series of metallized ridges. The PBC has through holes filled with solder. Thus, there is a series of electrical interconnections through the PBC, and the total length of any enclosed periphery is much shorter than the full periphery of the board so that high frequencies are attenuated.

Abstract translation: 光纤模块具有高频轨迹的PCB。 PCB被容纳在具有顶部和底部部分的壳体中，每个具有一系列金属化的脊。 PBC具有填充有焊料的通孔。 因此，通过PBC存在一系列电互连，并且任何封闭周边的总长度比板的整个周边短得多，使得高频衰减。

公开(公告)号：US20070002599A1

公开(公告)日：2007-01-04

申请号：US10546924

申请日：2003-02-28

Applicant: Robin Caven

Inventor： Robin Caven

IPC: H02M1/00

CPC classification number: H05K7/20518 ,  H05K1/0203 ,  H05K1/0216 ,  H05K1/181 ,  H05K2201/09972 ,  H05K2201/10409 ,  H05K2201/10598 ,  H05K2203/1572 ,  Y02P70/611

Abstract: The present invention relates to a circuit board of DSLAM and an arrangement to minimize thermal flow or electro-magnetic radiation from digital side to analog side, or vice versa. The circuit board comprises analog components and passive digital components on first side of the circuit board and active digital components on the second side of the circuit board. The arrangement comprises an enclosure having the circuit board with analog components, passive digital components, and active digital components and a first component connected between the first portion and the second portion of the circuit board to restrict thermal flow or electromagnetic radiation from one portion to another portion.

Abstract translation: 本发明涉及一种DSLAM的电路板以及用于使从数字侧到模拟侧的热流或电磁辐射最小化的布置，反之亦然。 电路板包括电路板第一面上的模拟部件和无源数字部件以及电路板第二面上的有源数字部件。 该装置包括具有模拟部件的电路板，无源数字部件和有源数字部件的壳体以及连接在电路板的第一部分和第二部分之间的第一部件，以限制从一个部分到另一个部分的热流或电磁辐射 一部分。

公开(公告)号：US07120398B2

公开(公告)日：2006-10-10

申请号：US10665958

申请日：2003-09-18

Applicant: Timothy Forrester

Inventor： Timothy Forrester

IPC: H04B1/04

CPC classification number: H05K1/0243 ,  H05K1/0231 ,  H05K1/024 ,  H05K2201/09063 ,  H05K2201/09972 ,  H05K2201/10075

Abstract: In accordance with the disclosed embodiment of the present invention, there is provided a technique to control and manage where the currents flow produced by noise producing components such as transmitters, and how to specifically exclude them from critical areas, such as where noise sensitive components are disposed. Such noise sensitive components may include oscillators and other components. According to a disclosed example of the present invention, an electrically-isolated area at least partially surrounds one or more noise-sensitive components. As disclosed herein, a gap in the elongated area receives one or more traces such as power plane, ground plane and signal traces for the partially surrounded component or components.

Abstract translation: 根据本发明的公开的实施例，提供了一种控制和管理噪声产生部件如发射器产生的电流流动的技术，以及如何将其从诸如噪声敏感部件的关键区域特别地排除在外 处置。 这些噪声敏感部件可以包括振荡器和其它部件。 根据本发明的公开示例，电隔离区域至少部分地围绕一个或多个噪声敏感部件。 如本文所公开的，细长区域中的间隙接收用于部分包围的部件或部件的一个或多个迹线，例如电源平面，接地平面和信号迹线。

公开(公告)号：US20060215434A1

公开(公告)日：2006-09-28

申请号：US11311948

申请日：2005-12-19

Applicant: Terry Lee ,  Joseph Jeddeloh

Inventor： Terry Lee ,  Joseph Jeddeloh

IPC: G11C5/06 ,  G06F12/00

CPC classification number: G11C5/02 ,  H05K1/0298 ,  H05K1/181 ,  H05K2201/09972 ,  Y02P70/611

Abstract: A layout for simultaneously sub-accessible memory modules is disclosed. In one embodiment, a memory module includes a printed circuit board having a plurality of sectors, each sector being electrically isolated from the other sectors and having a multi-layer structure. At least one memory device is attached to each sector, the memory devices being organized into a plurality of memory ranks. A driver is attached to the printed circuit board and is operatively coupled to the memory ranks. The driver is adapted to be coupled to a memory interface of the computer system. Because the sectors are electrically-isolated from adjacent sectors, the memory ranks are either individually or simultaneously, or both individually and simultaneously accessible by the driver so that one or more memory devices on a particular sector may be accessed at one time. In an alternate embodiment, the printed circuit board includes a driver sector electrically isolated from the other sectors and having a multi-layer structure, the driver being attached to the driver sector.

公开(公告)号：US07061095B2

公开(公告)日：2006-06-13

申请号：US09962094

申请日：2001-09-26

Applicant: David W. Boggs ,  Rebecca Jessep ,  Carolyn McCormick ,  Daryl Sato

Inventor： David W. Boggs ,  Rebecca Jessep ,  Carolyn McCormick ,  Daryl Sato

IPC: H01L23/48 ,  H01R9/00 ,  H05K1/03

CPC classification number: H05K1/0218 ,  H01L2924/0002 ,  H05K1/0206 ,  H05K3/0035 ,  H05K3/0041 ,  H05K3/107 ,  H05K3/4623 ,  H05K2201/09036 ,  H05K2201/09972 ,  H05K2201/09981 ,  H01L2924/00

Abstract: A printed circuit board and a system and method of embedding conductor channels into a printed circuit board. These conductor channels are used to provided increased power to circuits on the printed circuit board, provide shielding for these circuits and provide communications for these circuits. These conductor channels are created by ablating dielectric layers in the printed circuit board and depositing a conductive material therein.

Abstract translation: 一种印刷电路板以及将导体通道嵌入到印刷电路板中的系统和方法。 这些导体通道用于向印刷电路板上的电路提供增加的功率，为这些电路提供屏蔽并为这些电路提供通信。 这些导体通道是通过烧蚀印刷电路板中的电介质层并在其中沉积导电材料而产生的。

公开(公告)号：US20060050254A1

公开(公告)日：2006-03-09

申请号：US11185264

申请日：2005-07-20

Applicant: Wataru Nakagawa ,  Kazunori Hashimoto

Inventor： Wataru Nakagawa ,  Kazunori Hashimoto

IPC: G03B27/42

CPC classification number: H05K3/0002 ,  G03F7/2022 ,  H05K3/0082 ,  H05K2201/09781 ,  H05K2201/09972 ,  H05K2203/056

Abstract: A projection exposure apparatus and a method for producing a printed circuit board wherein, the whole pattern including pieces 10 and coupons 12 to be exposed on a print circuit board 2 is depicted on a photo mask 1 divided in six areas by divide line 19, the exposure will be made with respect to the each divided area of the photo mask 1 mounted on a movable photo mask stage 5 with using a masking device 3 masking other area than the exposing area.

Abstract translation: 一种投影曝光装置和印刷电路板的制造方法，其中，将包括要在印刷电路板2上露出的片10和优惠券12的整个图案描绘在通过划分线19划分为六个区域的光掩模1上， 将使用掩蔽装置3掩蔽安装在可移动光掩模台5上的其他区域的掩模装置3，对相对于安装在可移动光掩模台5上的光掩模1的每个划分区域进行曝光。

公开(公告)号：US06998740B2

公开(公告)日：2006-02-14

申请号：US10998573

申请日：2004-11-30

Applicant: Tatsuhiro Matsuki

Inventor： Tatsuhiro Matsuki

IPC: H02K1/32 ,  H02K11/00

CPC classification number: H05K1/0203 ,  H02K11/33 ,  H05K2201/066 ,  H05K2201/09972

Abstract: A heat sink member divides a circuit board into a first circuit part and a second circuit part. The first circuit part includes circuit elements, such as a transistor, an electric current sensing resistor and a choke coil, which generate heat upon operation thereof. The second circuit part includes a control circuit, which controls operation of the motor.

Abstract translation: 散热构件将电路板分成第一电路部分和第二电路部分。 第一电路部分包括诸如晶体管，电流感测电阻器和扼流线圈的电路元件，其在其工作时产生热量。 第二电路部分包括控制电路，其控制电动机的操作。

公开(公告)号：US06971162B2

公开(公告)日：2005-12-06

申请号：US10437721

申请日：2003-05-13

Applicant: John C. Estes ,  Rodolfo Lucero ,  Anthony M. Pavio

Inventor： John C. Estes ,  Rodolfo Lucero ,  Anthony M. Pavio

IPC: H01P1/203 ,  H03H9/02 ,  H03H9/05 ,  H05K1/02 ,  H05K1/16 ,  H05K1/18 ,  H05K3/30

CPC classification number: H03H9/0557 ,  H01P1/203 ,  H03H9/02913 ,  H05K1/0218 ,  H05K1/0237 ,  H05K1/0243 ,  H05K1/16 ,  H05K1/181 ,  H05K1/185 ,  H05K2201/09618 ,  H05K2201/09972 ,  H05K2201/10371 ,  Y10T29/4913 ,  Y10T29/49137 ,  Y10T29/49146 ,  Y10T29/49165 ,  Y10T29/53174 ,  Y10T29/53178

Abstract: An exemplary system and method for providing differential adjustment of the height of a multilayer substrate in localized areas for improved Q-factor performance of RF devices is disclosed as comprising inter alia: a multilayer substrate (200); an RF component (210) embedded in the substrate (200); a surface mounted component (220); and an RF shield (260) disposed next to the surface mounted component (220), wherein the height of the shield (260) does not extend substantially beyond the height of the surface mounted component (220). Disclosed features and specifications may be variously controlled, configured, adapted or otherwise optionally modified to further improve or otherwise optimize Q, RF performance and/or material characteristics. Exemplary embodiments of the present invention representatively provide for high-performance, high-quality RF devices that may be readily incorporated with existing technologies for the improvement of frequency response, device package form factors, weights and/or other manufacturing, device or material performance metrics.

Abstract translation: 公开了一种用于在局部区域中对多层基板的高度进行差分调整以提高RF器件的Q因子性能的示例性系统和方法，其特别包括：多层衬底（200）; 嵌入在所述基板（200）中的RF部件（210）; 表面安装部件（220）; 以及靠近所述表面安装部件（220）设置的RF屏蔽件（260），其中所述屏蔽件（260）的高度基本上不超过所述表面安装部件（220）的高度。 公开的特征和规范可以被不同地控制，配置，适配或以其他方式任意地修改，以进一步改善或者优化Q，RF性能和/或材料特性。 本发明的示例性实施例代表性地提供了可以容易地与用于改进频率响应，设备包装形状因子，重量和/或其他制造，设备或材料性能度量的现有技术结合的高性能，高质量的RF设备 。