公开(公告)号：US5316205A

公开(公告)日：1994-05-31

申请号：US43102

申请日：1993-04-05

Applicant: Cynthia Melton

Inventor： Cynthia Melton

IPC: H05K3/34

CPC classification number: H05K3/3426 ,  H05K3/3463 ,  H05K2201/10681 ,  H05K2201/10909 ,  H05K2201/10916 ,  H05K3/3473 ,  Y02P70/613 ,  Y10T29/49144

Abstract: A gold bump contact on an electronic component is solder bonded to a bond pad of a printed circuit board or the like utilizing a solder composed of tin-bismuth alloy. The solder is applied to the bond pad as an electroplate or a paste, after which the gold bump is superposed onto the bond pad. The assembly is heated to a first temperature to melt the solder and thereafter maintained at a temperature less than 150.degree. C. to permit the molten solder to wet the gold surface, after which the assembly is cooled to solidify the solder and complete the connection. Wetting at the relatively low temperature retards dissolution of the gold and thereby reduces formation of unwanted gold tin intermetallic compounds that tend to decrease mechanical properties of the connection.

Abstract translation: 使用由锡 - 铋合金构成的焊料将电子部件上的金凸点接触焊接到印刷电路板等的接合焊盘。 将焊料作为电镀板或糊料施加到接合焊盘，之后将金凸块重叠在接合焊盘上。 将组件加热至第一温度以熔化焊料，然后保持在低于150℃的温度下，以使熔融焊料润湿金表面，之后将组件冷却以固化焊料并完成连接。 在相对低的温度下润湿会延缓金的溶解，从而减少倾向于降低连接的机械性能的不想要的金锡金属间化合物的形成。

公开(公告)号：US5311341A

公开(公告)日：1994-05-10

申请号：US858512

申请日：1992-03-27

Applicant: Minoru Hirai

Inventor： Minoru Hirai

IPC: G02F1/1345 ,  G02F1/13 ,  H01L23/498 ,  H01R4/04 ,  H05K3/22 ,  H05K3/32 ,  H05K3/36 ,  G02F1/133 ,  G09F9/00

CPC classification number: G02F1/13452 ,  H01L23/4985 ,  H01L23/49883 ,  H01R4/04 ,  H05K3/361 ,  H01L2924/0002 ,  H05K2201/0394 ,  H05K2201/10681 ,  H05K2201/10992 ,  H05K2203/162 ,  H05K3/225 ,  H05K3/323

Abstract: The improved liquid-crystal display device has a slit formed in part of the TAB area where the electrodes on the liquid-crystal display panel are connected to the output terminals on the TAB and the liquid-crystal display panel is bonded to the TAB by means of a first anisotropic conductive adhesive having a comparatively weak adhesive force, such as a thermoplastic anisotropic conductive adhesive, whereas a second anisotropic conductive adhesive having a comparatively strong adhesive force, such as a uv curable adhesive, is coated in the slit. This liquid-crystal display device can be produced by a process that proceeds basically as follows: the electrodes on the liquid-crystal display panel are connected to the output terminals on the TAB by means of a thermoplastic adhesive as the first anisotropic conductive adhesive having a comparatively weak adhesive force; then, the assembly is subjected to an operating test; if the TAB is found to be defective in the operating test, it is replaced and, if no defect is found, a uv curable or a thermosetting adhesive as the second anisotropic conductive adhesive having a comparatively strong adhesive force is coated in the slit and then cured as the output terminals are compressed against the electrodes.

Abstract translation: 改进的液晶显示装置具有形成在TAB区域的一部分上的狭缝，其中液晶显示面板上的电极连接到TAB上的输出端子，并且液晶显示面板通过装置结合到TAB 具有比较弱的粘合力的第一各向异性导电粘合剂，例如热塑性各向异性导电粘合剂，而具有比较强的粘合力的第二各向异性导电粘合剂，例如紫外线可固化粘合剂，被涂覆在狭缝中。 该液晶显示装置可以通过以下方式进行制造：液晶显示面板上的电极通过热塑性粘合剂与TAB上的输出端子连接，作为第一各向异性导电粘合剂，具有 粘合力较弱; 然后，对组件进行操作试验; 如果在操作试验中发现TAB有缺陷，则更换，如果没有发现缺陷，则在狭缝中涂覆作为具有较强粘合力的第二各向异性导电粘合剂的紫外线固化型或热固性粘合剂，然后 当输出端子压靠电极时被固化。

公开(公告)号：US5274210A

公开(公告)日：1993-12-28

申请号：US25197

申请日：1993-03-02

Applicant: Gary M. Freedman ,  Maurice P. Brodeur ,  Peter J. Elmgren

Inventor： Gary M. Freedman ,  Maurice P. Brodeur ,  Peter J. Elmgren

IPC: B23K1/005 ,  B23K26/18 ,  H05K3/34 ,  B23K26/00

CPC classification number: B23K26/18 ,  B23K1/0056 ,  H05K3/3421 ,  B23K2201/40 ,  H05K2201/0112 ,  H05K2201/09781 ,  H05K2201/10681 ,  H05K2201/10689 ,  H05K2201/10909 ,  H05K2203/107 ,  H05K3/3494 ,  Y02P70/613

Abstract: This disclosure relates to laser bonding electrical components having conductive elements which are naturally reflective of the laser beam wavelength. Component leads or pads which are made of copper or have a gold coating, for example, will reflect the wavelength of an Nd:YAG laser, making it difficult to form physical and electrical bonds using the laser bonding technique. In preferred embodiments, the conductive elements are coated with a non-flux, non-metallic, coating material which is less reflective of the laser energy than the conductive elements, making it possible to efficiently use a laser to accomplish bonding.

Abstract translation: 本公开涉及具有天然反射激光束波长的导电元件的激光键合电气部件。 例如，由铜制成或具有金涂层的部件引线或焊盘将反映Nd：YAG激光器的波长，使得难以使用激光焊接技术形成物理和电连接。 在优选实施例中，导电元件涂覆有非导通的非金属涂层材料，其比导电元件更少地反映激光能量，使得可以有效地使用激光来实现粘合。

公开(公告)号：US5271147A

公开(公告)日：1993-12-21

申请号：US895800

申请日：1992-06-09

Applicant: Kinuko Ogata

Inventor： Kinuko Ogata

IPC: H01L21/60 ,  B23K1/00 ,  H01L21/68 ,  H05K3/34 ,  H05K13/04 ,  H01R43/00 ,  B23K1/02

CPC classification number: B23K1/0016 ,  H01L24/50 ,  H05K13/0465 ,  H05K3/3421 ,  B23K2201/40 ,  H01L2924/14 ,  H05K2201/10681 ,  H05K2203/0195 ,  Y02P70/613 ,  Y10T29/49121

Abstract: An outer bonding tool is used for bonding outer leads of a tape carrier on corresponding pads which are formed on a circuit substrate by solder after bonding inner leads of the tape carrier and electrodes of a generally rectangular semiconductor chip. The outer bonding tool includes a main body having a bottom surface, a pressing surface provided at the bottom surface of the main body for pressing against the outer leads of the tape carrier, where the pressing surface has a generally rectangular frame shape, and a groove formed in the pressing surface and extending generally perpendicularly to a corresponding group of outer leads extending from one side of the semiconductor chip. A width of the groove taken in a direction in which the corresponding group of outer leads extend is smaller than a length of the outer leads.

Abstract translation: 外接合工具用于将带状载体的外引线接合在相应的焊盘上，这些焊盘在带状载体的内引线和大致矩形的半导体芯片的电极之间通过焊料形成在电路基板上。 外接合工具包括：主体，其具有底面，设置在主体的底面的按压面，用于按压带状体的外部引线，其中按压面具有大致矩形的框架形状;以及沟槽 形成在按压表面上并且大致垂直于从半导体芯片的一侧延伸的对应的一组外引线延伸。 沿着相应的一组外引线延伸的方向所取的槽的宽度小于外引线的长度。

公开(公告)号：US5170931A

公开(公告)日：1992-12-15

申请号：US644528

申请日：1991-01-23

Applicant: Kishor V. Desai ,  Nelson P. Franchak ,  Robert H. Katyl ,  Harold Kohn ,  Tamar A. Sholtes ,  Vilakkudi G. Veeraraghavan ,  Charles G. Woychik

Inventor： Kishor V. Desai ,  Nelson P. Franchak ,  Robert H. Katyl ,  Harold Kohn ,  Tamar A. Sholtes ,  Vilakkudi G. Veeraraghavan ,  Charles G. Woychik

IPC: H01L21/98 ,  H01L23/498 ,  H01L23/538 ,  H05K1/14 ,  H05K3/34 ,  H05K3/36

CPC classification number: H01L25/50 ,  H01L23/4985 ,  H01L23/5385 ,  H05K3/3478 ,  H05K3/363 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73253 ,  H01L2924/01014 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/15321 ,  H05K1/141 ,  H05K2201/0215 ,  H05K2201/049 ,  H05K2201/10234 ,  H05K2201/10477 ,  H05K2201/10681 ,  H05K2201/10734 ,  H05K2201/10984 ,  H05K2203/0165 ,  H05K2203/0278 ,  H05K2203/041 ,  H05K2203/0557

Abstract: Method and apparatus are disclosed for mounting a flexible film semiconductor chip carrier on a second level electronic package. The resulting electronic packaging structure includes electrically conductive spacers, such as solder balls or solder coated copper balls, which electrically interconnect outer lead bonding pads on the flexible film semiconductor chip carrier and corresponding bonding pads on the second level electronic package, and which physically support the flexible film of the semiconductor chip carrier substantially in a plane above the surface of the second level electronic package. This electronic packaging structure is made using a special assembly fixture comprising a base plate, a pressure insert with a resilient member, and a top plate. The flexible film semiconductor chip carrier with the spacers attached thereto is placed over the resilient member of the pressure insert which is clamped together with the second level electronic package between the top and base plates. Then, this assembly is heated to reflow the solder of the spacers, and the assembly fixture is disassembled, leaving the flexible film semiconductor chip carrier mounted on the second level electronic package with the flexible film of the carrier having a planar geometry as desired. The spacers may be attached to the flexible film semiconductor chip carrier using a special template having a pattern of openings corresponding to the pattern of outer lead bonding pads on the flexible film semiconductor chip carrier.

公开(公告)号：US5161009A

公开(公告)日：1992-11-03

申请号：US708346

申请日：1991-05-31

Applicant: Minoru Tanoi ,  Masayasu Kizaki

Inventor： Minoru Tanoi ,  Masayasu Kizaki

IPC: G02F1/13 ,  H01L23/498 ,  H01R12/70 ,  H05K1/00 ,  H05K3/32 ,  H05K3/36

CPC classification number: H05K1/028 ,  H01L23/4985 ,  H01R12/7076 ,  G02F1/13452 ,  H01L2224/16 ,  H01L2924/01078 ,  H05K2201/0133 ,  H05K2201/0394 ,  H05K2201/10136 ,  H05K2201/10681 ,  H05K3/323 ,  H05K3/361

Abstract: An IC module includes a film substrate, a plurality of wiring leads, an electrically insulative plastic, and an IC chip. A junction structure of the IC module comprises the IC module, an electronic component, and an electrically conductive bonding compound to couple the IC module to the electronic component. The film substrate is provided with an opening. The plurality of wiring leads are arranged on the film substrate in a manner that some respective portions of the wiring leads bridge the opening provided in the film substrate, the electrically insulative plastic coats the some respective portions of the wiring leads which bridge the opening, and the IC chip is coupled to the wiring leads. The IC module is folded at a part where the some respective portions of the wiring leads bridge the opening.

公开(公告)号：US5153705A

公开(公告)日：1992-10-06

申请号：US665154

申请日：1991-03-06

Applicant: Kazuhiko Fukuta ,  Naoyuki Tajima ,  Yasunori Chikawa ,  Takaski Tsuda ,  Takamichi Maeda

Inventor： Kazuhiko Fukuta ,  Naoyuki Tajima ,  Yasunori Chikawa ,  Takaski Tsuda ,  Takamichi Maeda

IPC: H01L21/60 ,  G02F1/13 ,  H01L23/498 ,  H05K1/00

CPC classification number: H05K1/028 ,  H01L23/4985 ,  H01L24/50 ,  G02F1/13452 ,  H01L2924/07811 ,  H01L2924/14 ,  H05K2201/09036 ,  H05K2201/09063 ,  H05K2201/10136 ,  H05K2201/10681

Abstract: A TAB package for packaging a semiconductor chip includes a flexible base plate having a first surface and a second surface opposite to the first surface, an input and output leads being formed on the second surface of the flexible base plate and capable of being connected to the semiconductor chip, and a plurality of slits being formed on the first surface of the flexible base plate. Accordingly, the TAB package is allowed to be easily bent and kept in the bending state. The slits are formed in a manner to correspond to the intervals between the adjacent input and output leads so that the input and output leads can be reliably supported by the flexible base plate.

公开(公告)号：US5138429A

公开(公告)日：1992-08-11

申请号：US575099

申请日：1990-08-30

Applicant: V. K. Nagesh ,  Robert Crawford ,  Raj Pendse

Inventor： V. K. Nagesh ,  Robert Crawford ,  Raj Pendse

IPC: H01L21/60 ,  H01L23/495 ,  H01L23/498 ,  H05K1/11 ,  H05K3/34

CPC classification number: H05K3/3426 ,  H01L23/49572 ,  H01L23/49861 ,  H05K1/111 ,  H01L2924/0002 ,  H05K2201/094 ,  H05K2201/10681 ,  H05K2203/048 ,  Y02P70/611 ,  Y02P70/613 ,  Y10T428/24917

Abstract: Assemblies of aligned tape automated bonding frames on a substrate, and a method of aligning a tape automated bonding frame to connection sites on the substrate. The method includes photolithographically patterning and etching metal to form a first pattern of signal leads and a second pattern of alignment leads. A semiconductor chip is bonded to the inner lead ends of the first pattern. Metal on a substrate is photolithographically patterned and etched to provide a third pattern of substrate connection sites and a fourth pattern of registration pads. The fourth pattern of registration pads has geometric and dimensional features which precisely correspond to those of the alignment leads. Moreover, the spatial relationship of the third and fourth patterns correspond to the spatial relationship of the first and second patterns. The corresponding geometric and dimensional features of the second and fourth patterns are aligned, whereafter the registration pads and the alignment leads are soldered together. The attachment of the second and fourth patterns provide fixed registration of the first and third patterns. Preferably, the substrate includes redundant registration pads to facilitate replacement of a defective semiconductor chip.

Abstract translation: 在基板上的排列的胶带自动粘合框架的组件以及将带自动粘合框架与基板上的连接位置对准的方法。 该方法包括光刻图案化和蚀刻金属以形成信号引线的第一图案和对准引线的第二图案。 半导体芯片被结合到第一图案的内引线端。 对基板上的金属进行光刻图案化和蚀刻，以提供衬底连接位置的第三图案和配准焊盘的第四图案。 配准垫的第四种图案具有精确对应于对准引线的几何和尺寸特征。 此外，第三和第四图案的空间关系对应于第一和第二图案的空间关系。 对准第二和第四图案的对应的几何和尺寸特征，然后将对准焊盘和对准引线焊接在一起。 第二和第四图案的附接提供了第一和第三图案的固定配准。 优选地，衬底包括冗余对准衬垫，以便于更换有缺陷的半导体芯片。

公开(公告)号：US5115964A

公开(公告)日：1992-05-26

申请号：US724276

申请日：1991-07-01

Applicant: Joseph G. Ameen ,  Joseph Funari ,  John A. Goldfuss, Jr.

Inventor： Joseph G. Ameen ,  Joseph Funari ,  John A. Goldfuss, Jr.

IPC: H01L23/538 ,  H05K1/11 ,  H05K1/18 ,  H05K3/32 ,  H05K3/34

CPC classification number: H05K1/112 ,  H01L23/5387 ,  H05K3/3436 ,  H01L2224/16 ,  H01L2224/73253 ,  H05K1/189 ,  H05K2201/0394 ,  H05K2201/09472 ,  H05K2201/10681 ,  H05K2203/087 ,  H05K3/326 ,  H05K3/3494 ,  Y02P70/613

Abstract: A method of forming electrical connections between a flexible film carrier and an electronic device (e.g., semiconductor chip). The method comprises the steps of aligning the film carrier relative to the device having a plurality of solder mounds located on an upper surface thereof. The film carrier is engaged such that bridging portions of conductive leads thereof physically contact these solder mounds. Hot gas is passed through a screen member to heat the bridging portions of the leads to cause these leads to in turn heat the solder mounds to cause the mounds to become molten, whereafter these leads and mounds are cooled to form the desired solder bonds. The resulting structure may form part of an electronic package, this package also described herein.

Abstract translation: 在柔性膜载体和电子器件（例如，半导体芯片）之间形成电连接的方法。 该方法包括以下步骤：使膜载体相对于具有位于其上表面上的多个焊料堆的装置对准。 电影载体被接合，使得导电引线的桥接部分物理地接触这些焊接凹槽。 热气体通过筛构件以加热引线的桥接部分，从而使这些引导依次加热焊料块，使得土堆变得熔融，然后将这些引线和土堆冷却以形成所需的焊料接合。 所得到的结构可以形成电子封装的一部分，该封装也在本文中描述。

公开(公告)号：US5098008A

公开(公告)日：1992-03-24

申请号：US647092

申请日：1991-01-29

Applicant: Daniel J. Viza ,  Christopher M. Kerlin ,  Barry B. Groman

Inventor： Daniel J. Viza ,  Christopher M. Kerlin ,  Barry B. Groman

IPC: H05K3/34 ,  H05K13/04

CPC classification number: H05K3/3426 ,  H05K13/0465 ,  H05K2201/10424 ,  H05K2201/10681 ,  H05K2201/10689 ,  H05K2201/10924 ,  H05K2203/0195 ,  H05K2203/176 ,  Y02P70/613

Abstract: A method of mounting an integrated circuit carrier (10) having a plurality of straight leads (12) retained by an integral frame (16) is provided. The plurality of straight leads (12) of the carrier (10) is bent to form a plurality of bent leads (12) still retained by the frame (16). The plurality of bent leads are then scored to form a notch (32) on each bent lead. Solder fluxing, placing, and reflowing the plurality of bent leads of the integrated circuit carrier against corresponding printed lines of the printed circuit (26) surface before each notch follow. Finally, a remainder portion of the plurality of leads from and including the frame (16) to the notch (32) on each lead (12) is removed.

Abstract translation: 提供一种安装具有由整体框架（16）保持的多个直线引线（12）的集成电路载体（10）的方法。 载体（10）的多个直线引线（12）被弯曲以形成仍由框架（16）保持的多个弯曲引线（12）。 然后对多个弯曲引线进行刻痕，以在每个弯曲引线上形成凹口（32）。 在每个凹口跟随之前，将集成电路载体的多个弯曲引线焊接，放置和回流到相对于印刷电路（26）表面的印刷线路。 最后，去除从每个引线（12）上的框架（16）到凹槽（32）的多个引线的剩余部分。