Abstract:
The invention relates to a layer system comprising a contact element (5) and a substrate (1). A multilayer system (14) that is disposed on the substrate (1) has at least one top layer (3; 4) and a bottom layer (2; 3) as well as a contact element (5) which penetrates the at least one top layer (3; 4) and contacts the bottom layer (2; 3). The invention further relates to a method for producing a contact element (5) of a multi-layer system (14).
Abstract:
A technique for anchoring carbon nanotube columns to a substrate can include use of a filler material placed onto the surface of the substrate into area between the columns and surrounding a base portion of each of the columns.
Abstract:
The present invention provides a connector configured to electrically connect two connection objects. The connector comprises an elastic member having a surface and a conductive film placed on the surface of the elastic member. The conductive film comprises two contact portions to be brought into contact with the connection objects, respectively, and a connect portion connecting the contact portions. Each of the contact portions comprises projections and a drainage arranged, at least in part, between the projections.
Abstract:
A semiconductor device has a semiconductor element having a plurality of connection terminals, a circuit substrate electrically connected with the semiconductor element; and a connecting member arranged between the semiconductor element and the circuit substrate having a plurality of conductive projections each having a columnar portion, each of columnar portions are connected with each of connection terminals, a cross section of the columnar portion along a plane parallel to a surface of the semiconductor element being smaller than a surface area of each of connection terminals of the semiconductor element.
Abstract:
A method for manufacturing a printed wiring board includes forming a metal film on a surface of an insulative board, a plating resist on the metal film, and a plated-metal film on the metal film exposed from the plating resist, covering a portion of the plated-metal film with an etching resist, etching to reduce thickness of the plated-metal film exposed from the etching resist, removing the resists, and forming a wiring having a pad and a conductive circuit thinner than the pad by removing the metal film exposed through the removing of the plating resist, a solder-resist layer on the surface of the board and wiring, in the layer an opening exposing the pad and a portion of the circuit contiguous to the pad, a solder film on the pad and portion of the circuit exposed through the opening, and a solder bump on the pad by solder reflow.
Abstract:
A flexible printed circuit board (20) for electrically connecting an insulator substrate (21) and a plurality of elongate conductors (21a) laminated over the insulator substrate by an upper layer. The conductor has a contact engaging portion (211a) exposed over the insulator substrate at end thereof. The contact engaging portion (211a) defines an embossed portion (212) for engaging against the mating component.
Abstract:
A method of manufacturing a multilayer wiring structure is disclosed. The method comprises a step of forming a via post on a first metal wiring element, a step of printing an interlayer insulation film on the first metal wiring element, with use of a screen mask having a non-ejection area slightly larger than a head of the via post, such that the interlayer insulation film has an upper surface at the level lower than the head of the via post, while generally aligning the non-ejection area with the head of the via post, a step of curing the interlayer insulation film, and a step of forming a second metal wiring element in contact with the via post on the interlayer insulation film such that the first metal wiring element and the second metal wiring element are connected through the via post.
Abstract:
Provided is a printed circuit board having a bump interconnection structure that improves reliability between interconnection layers. Also provided is a method of fabricating the printed circuit board and semiconductor package using the printed circuit board. According to one embodiment, the printed circuit board includes a plurality of bumps formed on a resin layer between a first interconnection layer and a second interconnection layer. The second interconnection layer includes insertion holes corresponding to upper portions of the bumps so that the upper portions of the bumps protrude from the second interconnection layer. The upper portion of at least one of the bumps includes a rivet portion having a diameter greater that the diameter of the corresponding insertion hole to reliably interconnect the first and second interconnection layers.
Abstract:
Method for making a coreless packaging substrate are disclosed in the present invention. The coreless packaging substrate is made by first providing a metal adhesion layer having a melting point lower than that of the substrate, and removing a core board connected with the substrate therefrom through melting the metal adhesion layer. In addition, the disclosed packaging substrate further includes a circuit built-up structure of which has the electrical pads embedded under a surface. The disclosed packaging substrate can achieve the purposes of reducing the thickness, increasing circuit layout density, and facilitating the manufacturing of the substrate.
Abstract:
A method is disclosed which includes forming a layer of conductive material above a substrate, forming a masking layer above the layer of conductive material, performing a first etching process on the layer of conductive material with the masking layer in place, removing the masking layer and, after removing the masking layer, performing an isotropic etching process on the layer of conductive material to thereby define a plurality of piercing bond structures positioned on the substrate.