公开(公告)号：US20080138575A1

公开(公告)日：2008-06-12

申请号：US11856858

申请日：2007-09-18

Applicant: Chih-kuang Yang

Inventor： Chih-kuang Yang

IPC: B32B3/10 ,  H01R43/00

CPC classification number: H05K1/147 ,  H01L23/13 ,  H01L23/5385 ,  H01L25/162 ,  H01L2224/48091 ,  H01L2924/01322 ,  H01L2924/19107 ,  H05K1/142 ,  H05K3/4611 ,  H05K2201/058 ,  H05K2201/091 ,  H05K2201/09109 ,  H05K2201/0919 ,  H05K2201/09481 ,  Y10T29/417 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T428/24322 ,  Y10T428/24917 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A hybrid structure of multi-layer substrates comprises a first multi-layer substrate and a second multi-layer substrate. The first multi-layer substrate stacks up first metal layers, first dielectric layers alternately and has VIAs. A border district of a first metal layer connects with a border district of the corresponding first dielectric layer. The border districts are separated from adjacent first metal layers and adjacent first dielectric layers. The second multi-layer substrate stacks up second metal layers and second dielectric layers alternately. A border district of a second metal layer connects with a border district of the corresponding second dielectric layer. The border districts are separated from adjacent second metal layers and adjacent second dielectric layers. The VIAs are located at the border districts of the first dielectric layers and each VIA has electric conductor therein to connect one first metal layer with one second metal layer.

Abstract translation: 多层基板的混合结构包括第一多层基板和第二多层基板。 第一多层基板交替地堆叠第一金属层，第一介电层并具有VIA。 第一金属层的边界区域与相应的第一介电层的边界区域连接。 边界区域与相邻的第一金属层和相邻的第一介电层分离。 第二多层基板交替堆叠第二金属层和第二电介质层。 第二金属层的边界区域与相应的第二电介质层的边界区域连接。 边界区域与相邻的第二金属层和相邻的第二介电层分离。 VIA位于第一电介质层的边界区，并且每个VIA具有导电体，以将一个第一金属层与一个第二金属层连接。

公开(公告)号：US20070228106A1

公开(公告)日：2007-10-04

申请号：US11747572

申请日：2007-05-11

Applicant: Frank BRUNNECKER ,  Alexander Hofmann

Inventor： Frank BRUNNECKER ,  Alexander Hofmann

IPC: A47J36/02

CPC classification number: B29C66/8322 ,  B29C65/1435 ,  B29C65/1467 ,  B29C65/1616 ,  B29C65/1635 ,  B29C65/1667 ,  B29C65/606 ,  B29C65/7829 ,  B29C65/7841 ,  B29C66/542 ,  B29C66/7392 ,  B29C66/73921 ,  B29C66/81267 ,  B29C66/81423 ,  B29C66/843 ,  B29C2035/0822 ,  B29K2995/0027 ,  B29L2031/3061 ,  B29L2031/3425 ,  B29L2031/3481 ,  H05K3/0064 ,  H05K7/142 ,  H05K2201/0129 ,  H05K2201/091 ,  H05K2201/10598 ,  H05K2203/107

Abstract: A process is described for form locking joining of two components through plastic deformation of one of the two components. In order for the tool for forming the form locking connection not to get in direct contact with the plasticized area of the joining partners, a third component between the tool and the two components to be joined through form locking is being used, which simultaneously enters into an adhesive bond with one of the two components to be joined through form locking. The thermal energy for creating the plastic state of one of the joining partners and for developing the adhesive bond is applied through electromagnetic radiation through the third component.

Abstract translation: 描述了通过两个部件中的一个的塑性变形来形成两个部件的形状锁定连接的过程。 为了形成形式锁定连接的工具不能与接合伙伴的塑化区域直接接触，正在使用工具与通过形式锁定连接的两个部件之间的第三部件，其同时进入 与要通过形式锁定接合的两个部件之一粘合。 通过电磁辐射通过第三部件施加用于产生接合伙伴之一的塑性状态并用于显影粘合剂粘结的热能。

公开(公告)号：US20070224878A1

公开(公告)日：2007-09-27

申请号：US11457817

申请日：2006-07-17

Applicant: Shen-Hong Kao

Inventor： Shen-Hong Kao

IPC: H01R12/24

CPC classification number: H01R4/5083 ,  H01R12/78 ,  H05K3/365 ,  H05K2201/058 ,  H05K2201/091

Abstract: A method for connecting a flexible printed circuit (FPC) with a flexible circuitry component containing conducting wires is disclosed. The flexible circuitry component has an uncovered conducting portion. The proposed method includes providing a tenon and a holder with a groove corresponding to the tenon; and utilizing the tenon to wedge the uncovered conducting portion of the flexible circuitry component and a connecting region of the FPC in the groove of the holder to cause that the uncovered conducting portion contacts the connecting region.

Abstract translation: 公开了一种用于将柔性印刷电路（FPC）与包含导线的柔性电路部件连接的方法。 柔性电路部件具有未覆盖的导电部分。 所提出的方法包括提供榫头和具有对应于榫头的凹槽的支架; 并且利用榫头将柔性电路部件的未覆盖的导电部分和FPC的连接区域夹在保持器的凹槽中，以使得未覆盖的导电部分接触连接区域。

公开(公告)号：US20070158103A1

公开(公告)日：2007-07-12

申请号：US11684147

申请日：2007-03-09

Applicant: Ryuichiro WADA ,  Tetsuya IKEDA

Inventor： Ryuichiro WADA ,  Tetsuya IKEDA

IPC: H05K1/16 ,  H05K3/30

CPC classification number: H05K1/186 ,  H01L2224/16227 ,  H01L2924/15192 ,  H01L2924/15313 ,  H01L2924/19105 ,  H01L2924/3511 ,  H05K1/023 ,  H05K1/0306 ,  H05K1/0313 ,  H05K1/183 ,  H05K3/4614 ,  H05K3/4629 ,  H05K2201/0379 ,  H05K2201/091 ,  H05K2201/10636 ,  Y02P70/611 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49155

Abstract: A chip-type electronic component built-in multilayer board includes a multilayer board including two or more layered dielectric layers and an inner conductor pattern, and a chip-type electronic component which is provided at the interface of the upper and lower dielectric layers and includes an external terminal electrode. The external terminal electrode is connected to an in-plane conductor provided at a interface via a first connection conductor extending along the chip-type electronic component in the lower direction from the interface of the upper and lower dielectric layers, and a second connection conductor extending along the chip-type electronic component in the upper direction from the interface of the upper and lower dielectric layers.

Abstract translation: 芯片型电子元件内置多层板包括：多层基板，包括两层或多层叠层电介质层和内导体图案;以及芯片型电子元件，其设置在上下电介质层的界面处，并包括 外部端子电极。 外部端子电极通过第一连接导体连接到设置在界面处的面内导体，所述第一连接导体沿着所述芯片型电子部件从所述上部和下部电介质层的界面向下方延伸;以及第二连接导体， 沿着芯片型电子部件从上下电介质层的界面向上方延伸。

公开(公告)号：US20070144775A1

公开(公告)日：2007-06-28

申请号：US11635407

申请日：2006-12-06

Applicant: Kenji Hasegawa

Inventor： Kenji Hasegawa

IPC: H05K1/11 ,  H01R12/04

CPC classification number: H05K3/421 ,  H05K3/3494 ,  H05K2201/091 ,  H05K2201/09509 ,  H05K2203/1178 ,  H05K2203/1394 ,  H05K2203/162

Abstract: According to one embodiment, there is provided a substrate inspection method including forming a film over an opening portion of a blind via hole formed in a printed-wiring board, and heating the printed-wiring board. Based on a variation in the shape of the film, it is possible to determine a defective blind via hole.

Abstract translation: 根据一个实施例，提供了一种基板检查方法，包括在形成在印刷电路板上的盲通孔的开口部分上形成膜，并加热印刷电路板。 基于薄膜形状的变化，可以确定有缺陷的盲孔。

公开(公告)号：US07166914B2

公开(公告)日：2007-01-23

申请号：US10876897

申请日：2004-06-25

Applicant: Thomas H. DiStefano ,  John W. Smith ,  Tony Faraci

Inventor： Thomas H. DiStefano ,  John W. Smith ,  Tony Faraci

IPC: H01L23/34 ,  H01L29/0623 ,  H01L23/495 ,  H01L23/06 ,  H01L23/10

CPC classification number: H01L21/4839 ,  H01L23/22 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/4985 ,  H01L23/642 ,  H01L24/72 ,  H01L2224/16225 ,  H01L2224/45124 ,  H01L2224/73253 ,  H01L2224/81904 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01042 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/01322 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/3025 ,  H01L2924/351 ,  H05K1/118 ,  H05K3/361 ,  H05K3/4084 ,  H05K2201/0133 ,  H05K2201/0394 ,  H05K2201/0397 ,  H05K2201/09081 ,  H05K2201/091 ,  H05K2203/063 ,  H01L2924/00 ,  H01L2224/48

Abstract: A packaged semiconductor chip including the chip, and a package element such as a heat sink is made by connecting flexible leads between contacts on the chip and terminals on a dielectric element such as a sheet or plate and moving the sheet or plate away from the chip, and injecting a liquid material to form a compliant layer filling the space between the package element and the dielectric element, and surrounding the leads. The dielectric element and package element extend outwardly beyond the edges of the chip, and physically protect the chip. The assembly may be handled and mounted by conventional surface mounting techniques. The assembly may include additional circuit elements such as capacitors used in conjunction with the chip.

Abstract translation: 包括芯片的封装半导体芯片和诸如散热器的封装元件通过将芯片上的触点之间的柔性引线和诸如片材或板之类的电介质元件上的端子连接并将片或板远离芯片 并且注入液体材料以形成填充封装元件和电介质元件之间的空间并且围绕引线的柔性层。 介质元件和封装元件向外延伸超过芯片的边缘，并物理保护芯片。 组件可以通过常规的表面安装技术来处理和安装。 组件可以包括附加电路元件，例如与芯片结合使用的电容器。

公开(公告)号：US20060281293A1

公开(公告)日：2006-12-14

申请号：US11423027

申请日：2006-06-08

Applicant: Tatsuhiro URUSHIDO

Inventor： Tatsuhiro URUSHIDO

IPC: H01L21/44

CPC classification number: H01L23/4985 ,  H01L24/10 ,  H01L24/13 ,  H01L24/81 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/05644 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/13144 ,  H01L2224/81203 ,  H01L2224/81205 ,  H01L2224/81801 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/19041 ,  H01L2924/19043 ,  H05K1/189 ,  H05K3/3436 ,  H05K3/4092 ,  H05K2201/091 ,  H05K2201/10674 ,  H05K2203/0278 ,  Y02P70/613 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: A method for manufacturing a semiconductor device, includes: mounting a semiconductor chip having an electrode on a wiring substrate having a base substrate and a wiring formed on the base substrate; forming a eutectic alloy by contacting the wiring with the electrode and by heating and pressurizing, and; forming the eutectic alloy so as a part of the eutectic alloy enters between the wiring and the base substrate.

公开(公告)号：US20060035410A1

公开(公告)日：2006-02-16

申请号：US10918679

申请日：2004-08-12

Applicant: Stephen Shiffer

Inventor： Stephen Shiffer

IPC: H01L21/50

CPC classification number: H05K1/184 ,  H05K1/182 ,  H05K1/189 ,  H05K3/326 ,  H05K2201/0133 ,  H05K2201/09081 ,  H05K2201/091 ,  H05K2201/09981 ,  H05K2201/1059 ,  H05K2201/10636 ,  Y02P70/611

Abstract: An apparatus and method for providing three-dimensional carrier mounting of one or more electronic components. In accordance with one embodiment, the device mounting apparatus of the present invention includes an elastically resilient plastic substrate having component mounting surfaces in at least two dimensions. At least one press-fit component insertion cavity is disposed within the component mounting surfaces to provide compressive retention of the electronic component when press-fit into the cavity. Preferably, the cavity has a depth such that when the component is press-fit, it does not extend above the surface plane of the cavity. The insertion cavity is further characterized as including at least one conductive trace disposed on an inner surface of said insertion cavity and positioned on the insertion cavity surface such that the conductive trace contacts at least one lead of the electronic device retained within the insertion cavity.

公开(公告)号：US06966482B2

公开(公告)日：2005-11-22

申请号：US10340798

申请日：2003-01-13

Applicant: Makoto Totani ,  Toshihiro Miyake ,  Tomohiro Yokochi ,  Takehito Teramae ,  Yoshitaro Yazaki ,  Kazuyuki Deguchi ,  Hajime Nakagawa

Inventor： Makoto Totani ,  Toshihiro Miyake ,  Tomohiro Yokochi ,  Takehito Teramae ,  Yoshitaro Yazaki ,  Kazuyuki Deguchi ,  Hajime Nakagawa

IPC: H01R12/62 ,  H05K3/34 ,  H05K3/36 ,  H05K1/03 ,  B23K31/02 ,  H01L23/48

CPC classification number: H05K3/363 ,  H05K3/3452 ,  H05K3/3494 ,  H05K2201/0129 ,  H05K2201/091 ,  H05K2201/0989 ,  H05K2201/09909 ,  H05K2201/10772 ,  H05K2203/0195 ,  H05K2203/0278 ,  H05K2203/065

Abstract: Lands formed on a flexible printed circuit board are electrically connected with lands formed on a rigid printed circuit board through solder. At this point, solder resist is formed between neighboring two lands on the rigid printed circuit board, and is terminated with an end portion that is interposed between the rigid printed circuit board and the flexible printed circuit board. Accordingly, even when surplus solder is extruded onto the rigid printed circuit board, the solder resist can prevent solder bridges from being formed between the lands.

Abstract translation: 形成在柔性印刷电路板上的焊盘通过焊料与刚性印刷电路板上形成的焊盘电连接。 此时，在刚性印刷电路板上的相邻的两个焊盘之间形成阻焊剂，并且端接有刚性印刷电路板和柔性印刷电路板之间的端部。 因此，即使剩余焊料被挤出到刚性印刷电路板上，阻焊剂也可以防止在焊盘之间形成焊料桥。

公开(公告)号：US20050237725A1

公开(公告)日：2005-10-27

申请号：US11107979

申请日：2005-04-18

Applicant: Jin-woo Cho ,  Seong-woon Booh ,  Dong-woo Lee ,  Ki-taek Kim ,  Yun-mi Seo ,  Dong-ok Kwak

Inventor： Jin-woo Cho ,  Seong-woon Booh ,  Dong-woo Lee ,  Ki-taek Kim ,  Yun-mi Seo ,  Dong-ok Kwak

IPC: H05K1/02 ,  H01R35/02 ,  H04M1/02 ,  H05K1/00 ,  H05K7/16

CPC classification number: H05K1/028 ,  H01R35/02 ,  H05K2201/091

Abstract: A flexible printed circuit board is robust to a repeated twisting and consists of a minute circuit printed on a flexible insulated material sheet, and has the bent parts of the opposite edges symmetrical in structure. The bent parts are straightened out when twisting occurs. In the flexible printed circuit board, the opposite edges are longer in length than the middle part such that the tensile deformation at the opposite edges at the time of twisting does not occur or is minimized.

Abstract translation: 柔性印刷电路板对于反复扭转是坚固的，并且由打印在柔性绝缘材料片上的微小电路组成，并且相对边缘的弯曲部分在结构上对称。 弯曲部分在发生扭曲时被拉直。 在柔性印刷电路板中，相对边缘的长度比中间部分长，使得扭曲时的相对边缘处的拉伸变形不发生或最小化。